George A. Constantinides

	2012
115		Abid Rafique, Nachiket Kapre, George A. Constantinides: A High Throughput FPGA-Based Implementation of the Lanczos Method for the Symmetric Extremal Eigenvalue Problem. ARC 2012: 239-250
114		Xuan You Tan, David Boland, George A. Constantinides: FPGA Paranoia: Testing Numerical Properties of FPGA Floating Point IP-Cores. ARC 2012: 290-301
113		David Boland, George A. Constantinides: A scalable approach for automated precision analysis. FPGA 2012: 185-194
112		Samuel Bayliss, George A. Constantinides: Optimizing SDRAM bandwidth for custom FPGA loop accelerators. FPGA 2012: 195-204
111		Juan Luis Jerez, Eric C. Kerrigan, George A. Constantinides: A sparse and condensed QP formulation for predictive control of LTI systems. Automatica 48(5): 999-1002 (2012)
110		Qiang Liu, Tim Todman, Wayne Luk, George A. Constantinides: Automated Mapping of the MapReduce Pattern onto Parallel Computing Platforms. Signal Processing Systems 67(1): 65-78 (2012)
	2011
109		Christophe Le Lann, David Boland, George A. Constantinides: The Krawczyk Algorithm: Rigorous Bounds for Linear Equation Solution on an FPGA. ARC 2011: 287-295
108		Samuel Bayliss, George A. Constantinides: Application Specific Memory Access, Reuse and Reordering for SDRAM. ARC 2011: 41-52
107		Manouk V. Manoukian, George A. Constantinides: Accurate Floating Point Arithmetic through Hardware Error-Free Transformations. ARC 2011: 94-101
106		Stefano Longo, Eric C. Kerrigan, Keck Voon Ling, George A. Constantinides: Parallel move blocking Model Predictive Control. CDC-ECE 2011: 1239-1244
105		Ammar Hasan, Eric C. Kerrigan, George A. Constantinides: Solving a positive definite system of linear equations via the matrix exponential. CDC-ECE 2011: 2299-2304
104		Juan Luis Jerez, Eric C. Kerrigan, George A. Constantinides: A condensed and sparse QP formulation for predictive control. CDC-ECE 2011: 5217-5222
103		Theo Drane, George A. Constantinides: Optimisation of mutually exclusive arithmetic sum-of-products. DATE 2011: 1388-1393
102		Juan Luis Jerez, George A. Constantinides, Eric C. Kerrigan: An FPGA implementation of a sparse quadratic programming solver for constrained predictive control. FPGA 2011: 209-218
101		Joshua M. Levine, Edward A. Stott, George A. Constantinides, Peter Y. K. Cheung: Health monitoring of live circuits in FPGAs based on time delay measurement (abstract only). FPGA 2011: 284
100		Stefano Longo, Eric C. Kerrigan, Keck Voon Ling, George A. Constantinides: A parallel formulation for predictive control with nonuniform hold constraints. Annual Reviews in Control 35(2): 207-214 (2011)
99		Amir Shahzad, Bryn Ll. Jones, Eric C. Kerrigan, George A. Constantinides: An efficient algorithm for the solution of a coupled Sylvester equation appearing in descriptor systems. Automatica 47(1): 244-248 (2011)
98		Qiang Liu, George A. Constantinides, Konstantinos Masselos, Peter Y. K. Cheung: Compiling C-like Languages to FPGA Hardware: Some Novel Approaches Targeting Data Memory Organization. Comput. J. 54(1): 1-10 (2011)
97		George A. Constantinides, Nicola Nicolici: Guest Editors' Introduction: Surveying the Landscape of FPGA Accelerator Research. IEEE Design & Test of Computers 28(4): 6-7 (2011)
96		George A. Constantinides, Adam B. Kinsman, Nicola Nicolici: Numerical Data Representations for FPGA-Based Scientific Computing. IEEE Design & Test of Computers 28(4): 8-17 (2011)
95		David Boland, George A. Constantinides: Bounding Variable Values and Round-Off Effects Using Handelman Representations. IEEE Trans. on CAD of Integrated Circuits and Systems 30(11): 1691-1704 (2011)
94		David Boland, George A. Constantinides: Optimizing memory bandwidth use and performance for matrix-vector multiplication in iterative methods. TRETS 4(3): 22 (2011)
	2010
93		Antonio Roldao Lopes, George A. Constantinides: A Fused Hybrid Floating-Point and Fixed-Point Dot-Product for FPGAs. ARC 2010: 157-168
92		David Boland, George A. Constantinides: Optimising Memory Bandwidth Use for Matrix-Vector Multiplication in Iterative Methods. ARC 2010: 169-181
91		Chalermpol Saiprasert, Christos-Savvas Bouganis, George A. Constantinides: Design of a Financial Application Driven Multivariate Gaussian Random Number Generator for an FPGA. ARC 2010: 182-193
90		Amir Shahzad, Eric C. Kerrigan, George A. Constantinides: A fast well-conditioned interior point method for predictive control. CDC 2010: 508-513
89		Ammar Hasan, Eric C. Kerrigan, George A. Constantinides: An ISS and l-stability approach to forward error analysis of iterative numerical algorithms. CDC 2010: 780-785
88		Tim Todman, Qiang Liu, Wayne Luk, George A. Constantinides: Customizable Composition and Parameterization of Hardware Design Transformations. DSD 2010: 595-602
87		David Boland, George A. Constantinides: Automated Precision Analysis: A Polynomial Algebraic Approach. FCCM 2010: 157-164
86		Tim Todman, Qiang Liu, Wayne Luk, George A. Constantinides: A Scripting Engine for Combining Design Transformations. FCCM 2010: 255-258
85		Chalermpol Saiprasert, Christos-Savvas Bouganis, George A. Constantinides: Mapping Multiple Multivariate Gaussian Random Number Generators on an FPGA. FPL 2010: 89-94
84		Juan Luis Jerez, George A. Constantinides, Eric C. Kerrigan: FPGA implementation of an interior point solver for linear model predictive control. FPT 2010: 316-319
83		Alastair M. Smith, George A. Constantinides, Peter Y. K. Cheung: FPGA Architecture Optimization Using Geometric Programming. IEEE Trans. on CAD of Integrated Circuits and Systems 29(8): 1163-1176 (2010)
82		Antonio Roldao Lopes, George A. Constantinides: A High Throughput FPGA-Based Floating Point Conjugate Gradient Implementation for Dense Matrices. TRETS 3(1): (2010)
81		Alastair M. Smith, George A. Constantinides, Peter Y. K. Cheung: An Automated Flow for Arithmetic Component Generation in Field-Programmable Gate Arrays. TRETS 3(3): 13 (2010)
80		Chalermpol Saiprasert, Christos-Savvas Bouganis, George A. Constantinides: An Optimized Hardware Architecture of a Multivariate Gaussian Random Number Generator. TRETS 4(1): 2 (2010)
79		Asma Kahoul, Alastair M. Smith, George A. Constantinides, Peter Y. K. Cheung: Efficient Heterogeneous Architecture Floorplan Optimization using Analytical Methods. TRETS 4(1): 3 (2010)
	2009
78		Asma Kahoul, George A. Constantinides, Alastair M. Smith, Peter Y. K. Cheung: Heterogeneous Architecture Exploration: Analysis vs. Parameter Sweep. ARC 2009: 133-144
77		Chalermpol Saiprasert, Christos-Savvas Bouganis, George A. Constantinides: Word-Length Optimization and Error Analysis of a Multivariate Gaussian Random Number Generator. ARC 2009: 231-242
76		Antonio Roldao Lopes, Amir Shahzad, George A. Constantinides, Eric C. Kerrigan: More Flops or More Precision? Accuracy Parameterizable Linear Equation Solvers for Model Predictive Control. FCCM 2009: 209-216
75		Alastair M. Smith, George A. Constantinides, Peter Y. K. Cheung: Area estimation and optimisation of FPGA routing fabrics. FPL 2009: 256-261
74		Qiang Liu, Tim Todman, José Gabriel de Figueiredo Coutinho, Wayne Luk, George A. Constantinides: Optimising designs by combining model-based and pattern-based transformations. FPL 2009: 308-313
73		Jonathan A. Clarke, George A. Constantinides, Peter Y. K. Cheung: Word-length selection for power minimization via nonlinear optimization. ACM Trans. Design Autom. Electr. Syst. 14(3): (2009)
72		Qiang Liu, George A. Constantinides, Konstantinos Masselos, Peter Y. K. Cheung: Combining Data Reuse With Data-Level Parallelization for FPGA-Targeted Hardware Compilation: A Geometric Programming Framework. IEEE Trans. on CAD of Integrated Circuits and Systems 28(3): 305-315 (2009)
71		Qiang Liu, George A. Constantinides, Konstantinos Masselos, Peter Y. K. Cheung: Data-reuse exploration under an on-chip memory constraint for low-power FPGA-based systems. IET Computers & Digital Techniques 3(3): 235-246 (2009)
70		Vanderlei Bonato, Eduardo Marques, George A. Constantinides: A Floating-point Extended Kalman Filter Implementation for Autonomous Mobile Robots. Signal Processing Systems 56(1): 41-50 (2009)
69		Christos-Savvas Bouganis, Sung-Boem Park, George A. Constantinides, Peter Y. K. Cheung: Synthesis and Optimization of 2D Filter Designs for Heterogeneous FPGAs. TRETS 1(4): (2009)
68		Maria E. Angelopoulou, Christos-Savvas Bouganis, Peter Y. K. Cheung, George A. Constantinides: Robust Real-Time Super-Resolution on FPGA and an Application to Video Enhancement. TRETS 2(4): (2009)
	2008
67		Maria E. Angelopoulou, Christos-Savvas Bouganis, Peter Y. K. Cheung, George A. Constantinides: FPGA-based Real-time Super-Resolution on an Adaptive Image Sensor. ARC 2008: 124-135
66		Vanderlei Bonato, Eduardo Marques, George A. Constantinides: A Parallel Hardware Architecture for Image Feature Detection. ARC 2008: 136-147
65		Chalermpol Saiprasert, Christos-Savvas Bouganis, George A. Constantinides: Multivariate Gaussian Random Number Generator Targeting Specific Resource Utilization in an FPGA. ARC 2008: 231-242
64		Antonio Roldao Lopes, George A. Constantinides: A High Throughput FPGA-based Floating Point Conjugate Gradient Implementation. ARC 2008: 75-86
63		Qiang Liu, George A. Constantinides, Konstantinos Masselos, Peter Y. K. Cheung: Compiling C-like Languages to FPGA Hardware: Some Novel Approaches Targeting Data Memory Organisation. BCS Int. Acad. Conf. 2008: 295-304
62		Qiang Liu, George A. Constantinides, Konstantinos Masselos, Peter Y. K. Cheung: Combining data reuse exploitationwith data-level parallelization for FPGA targeted hardware compilation: A geometric programming framework. FPL 2008: 179-184
61		David Boland, George A. Constantinides: An FPGA-based implementation of the MINRES algorithm. FPL 2008: 379-384
60		Jonathan A. Clarke, George A. Constantinides, Peter Y. K. Cheung, Alastair M. Smith: Glitch-aware output switching activity from word-level statistics. ISCAS 2008: 1792-1795
59		Vanderlei Bonato, Eduardo Marques, George A. Constantinides: A Parallel Hardware Architecture for Scale and Rotation Invariant Feature Detection. IEEE Trans. Circuits Syst. Video Techn. 18(12): 1703-1712 (2008)
58		Alastair M. Smith, George A. Constantinides, Peter Y. K. Cheung: Integrated Floorplanning, Module-Selection, and Architecture Generationfor Reconfigurable Devices. IEEE Trans. VLSI Syst. 16(6): 733-744 (2008)
57		Su-Shin Ang, George A. Constantinides, Wayne Luk, Peter Y. K. Cheung: Custom parallel caching schemes for hardware-accelerated image compression. J. Real-Time Image Processing 3(4): 289-302 (2008)
56		George A. Constantinides, Wai-Kei Mak, Theerayod Wiangtong: Guest Editorial: Field Programmable Technology. Signal Processing Systems 51(1): 1-2 (2008)
	2007
55		Qiang Liu, George A. Constantinides, Konstantinos Masselos, Peter Y. K. Cheung: Automatic On-chip Memory Minimization for Data Reuse. FCCM 2007: 251-260
54		Su-Shin Ang, George A. Constantinides, Wayne Luk, Peter Y. K. Cheung: A Hybrid Memory Sub-system for Video Coding Applications. FCCM 2007: 317-318
53		Jonathan A. Clarke, George A. Constantinides, Peter Y. K. Cheung: On the feasibility of early routing capacitance estimation for FPGAs. FPL 2007: 234-239
52		Vanderlei Bonato, Eduardo Marques, George A. Constantinides: A floating-point Extended Kalman Filter implementation for autonomous mobile robots. FPL 2007: 576-579
51		N. Pete Sedcole, Peter Y. K. Cheung, George A. Constantinides, Wayne Luk: Run-Time Integration of Reconfigurable Video Processing Systems. IEEE Trans. VLSI Syst. 15(9): 1003-1016 (2007)
50		Gareth W. Morris, George A. Constantinides, Peter Y. K. Cheung: ROM to DSP block transfer for resource constrained synthesis. IET Computers & Digital Techniques 1(1): 17-26 (2007)
49		George A. Constantinides: Special issue on Field-Programmable Technology. J. Real-Time Image Processing 2(4): 177-178 (2007)
	2006
48		Su-Shin Ang, George A. Constantinides, Peter Y. K. Cheung, Wayne Luk: A Flexible Multi-port Caching Scheme for Reconfigurable Platforms. ARC 2006: 205-216
47		Alastair M. Smith, George A. Constantinides, Peter Y. K. Cheung: A Novel Hueristic and Provable Bounds for Reconfigurable Architecture Design. FCCM 2006: 275-276
46		Nicola Campregher, Peter Y. K. Cheung, George A. Constantinides, Milan Vasilko: Yield enhancements of design-specific FPGAs. FPGA 2006: 93-100
45		Su-Shin Ang, George A. Constantinides: Dynamic Memory Sub-System for Reconfigurable Platforms. FPL 2006: 1-2
44		Jonathan A. Clarke, George A. Constantinides: High-Level Power Optimization for Digital Signal Processing in Reconfigurable Logic. FPL 2006: 1-2
43		Alastair M. Smith, George A. Constantinides, Peter Y. K. Cheung: A Novel Heuristic and Provable Bounds for Reconfigurable Architecture Design. FPL 2006: 1-6
42		Konstantinos Masselos, George A. Constantinides, Qiang Liu: Data Reuse Exploration for FPGA Based Platforms Applied to the Full Search Motion Estimation Algorithm. FPL 2006: 1-6
41		Kieron Turkington, Konstantinos Masselos, George A. Constantinides, Philip Heng Wai Leong: FPGA Based Acceleration of the Linpack Benchmark: A High Level Code Transformation Approach. FPL 2006: 1-6
40		Nicola Campregher, Peter Y. K. Cheung, George A. Constantinides, Milan Vasilko: Reconfiguration and Fine-Grained Redundancy for Fault Tolerance in FPGAs. FPL 2006: 1-6
39		N. Pete Sedcole, Peter Y. K. Cheung, George A. Constantinides, Wayne Luk: On-Chip Communication in Run-Time Assembled Reconfigurable Systems. ICSAMOS 2006: 168-176
38		Jonathan A. Clarke, Altaf Abdul Gaffar, George A. Constantinides, Peter Y. K. Cheung: Fast word-level power models for synthesis of FPGA-based arithmetic. ISCAS 2006
37		George A. Constantinides: Word-length optimization for differentiable nonlinear systems. ACM Trans. Design Autom. Electr. Syst. 11(1): 26-43 (2006)
36		Dong-U Lee, Altaf Abdul Gaffar, Ray C. C. Cheung, Oskar Mencer, Wayne Luk, George A. Constantinides: Accuracy-Guaranteed Bit-Width Optimization. IEEE Trans. on CAD of Integrated Circuits and Systems 25(10): 1990-2000 (2006)
	2005
35		Christos-Savvas Bouganis, George A. Constantinides, Peter Y. K. Cheung: A Novel 2D Filter Design Methodology for Heterogeneous Devices. FCCM 2005: 13-22
34		Nicola Campregher, Peter Y. K. Cheung, George A. Constantinides, Milan Vasilko: Analysis of yield loss due to random photolithographic defects in the interconnect structure of FPGAs. FPGA 2005: 138-148
33		Alastair M. Smith, George A. Constantinides, Peter Y. K. Cheung: Exploration of heterogeneous reconfigurable architectures (abstract only). FPGA 2005: 268
32		Nalin Sidahao, George A. Constantinides, Peter Y. K. Cheung: Power and Area Optimization for Multiple Restricted Multiplication. FPL 2005: 112-117
31		Chun Te Ewe, Peter Y. K. Cheung, George A. Constantinides: Error Modelling of Dual FiXed-point Arithmetic and its Application in Field Programmable Logic. FPL 2005: 124-129
30		Christos-Savvas Bouganis, Peter Y. K. Cheung, George A. Constantinides: Heterogeneity Exploration for Multiple 2D Filter Designs. FPL 2005: 263-268
29		Iosifina Pournara, Christos-Savvas Bouganis, George A. Constantinides: FPGA-Accelerated Reconstruction of Gene Regulatory Networks. FPL 2005: 323-328
28		Alastair M. Smith, George A. Constantinides, Peter Y. K. Cheung: An Analytical Approach to Generation and Exploration of Reconfigurable Architectures. FPL 2005: 341-346
27		Nicola Campregher, Peter Y. K. Cheung, George A. Constantinides, Milan Vasilko: Yield modelling and Yield Enhancement for FPGAs using Fault Tolerance Schemes. FPL 2005: 409-414
26		Jonathan A. Clarke, Altaf Abdul Gaffar, George A. Constantinides: Parameterized Logic Power Consumption Models for FPGA based Systems. FPL 2005: 626-629
25		Gareth W. Morris, George A. Constantinides, Peter Y. K. Cheung: Using DSP Blocks For ROM Replacement: A Novel Synthesis Flow. FPL 2005: 77-82
24		Christos-Savvas Bouganis, George A. Constantinides, Peter Y. K. Cheung: A novel 2D filter design methodology. ISCAS (1) 2005: 532-535
23		Nalin Sidahao, George A. Constantinides, Peter Y. K. Cheung: A heuristic approach for multiple restricted multiplication. ISCAS (1) 2005: 692-695
22		George A. Constantinides, Peter Y. K. Cheung, Wayne Luk: Optimum and heuristic synthesis of multiple word-length architectures. IEEE Trans. VLSI Syst. 13(1): 39-57 (2005)
	2004
21		George A. Constantinides, Peter Y. K. Cheung, Wayne Luk: Synthesis and optimization of DSP algorithms. Kluwer 2004: I-XI, 1-164
20		N. Pete Sedcole, Peter Y. K. Cheung, George A. Constantinides, Wayne Luk: A Structured System Methodology for FPGA Based System-on-A-Chip Design. FCCM 2004: 271-272
19		George A. Constantinides, Abunaser Miah, Nalin Sidahao: Word-Length Optimization of Folded Polynomial Evaluation. FCCM 2004: 285-286
18		Gareth W. Morris, George A. Constantinides, Peter Y. K. Cheung: Migrating Functionality from ROMS to Embedded Multipliers. FCCM 2004: 287-288
17		N. Pete Sedcole, Peter Y. K. Cheung, George A. Constantinides, Wayne Luk: A Structured Methodology for System-on-an-FPGA Design. FPL 2004: 1047-1051
16		Chun Te Ewe, Peter Y. K. Cheung, George A. Constantinides: Dual Fixed-Point: An Efficient Alternative to Floating-Point Computation. FPL 2004: 200-208
15		Nalin Sidahao, George A. Constantinides, Peter Y. K. Cheung: Multiple Restricted Multiplication. FPL 2004: 374-383
14		Peter Y. K. Cheung, George A. Constantinides, José T. de Sousa: Guest Editors' Introduction: Field Programmable Logic and Applications. IEEE Trans. Computers 53(11): 1361-1362 (2004)
	2003
13		Peter Y. K. Cheung, George A. Constantinides, José T. de Sousa: Field Programmable Logic and Application, 13th International Conference, FPL 2003, Lisbon, Portugal, September 1-3, 2003, Proceedings Springer 2003
12		George A. Constantinides: Perturbation Analysis for Word-length Optimization. FCCM 2003: 81-90
11		N. Pete Sedcole, Peter Y. K. Cheung, George A. Constantinides, Wayne Luk: A Reconfigurable Platform for Real-Time Embedded Video Image Processing. FPL 2003: 606-615
10		Nalin Sidahao, George A. Constantinides, Peter Y. K. Cheung: Architectures for function evaluation on FPGAs. ISCAS (2) 2003: 804-807
9		George A. Constantinides, Peter Y. K. Cheung, Wayne Luk: Synthesis of saturation arithmetic architectures. ACM Trans. Design Autom. Electr. Syst. 8(3): 334-354 (2003)
8		George A. Constantinides, Peter Y. K. Cheung, Wayne Luk: Wordlength optimization for linear digital signal processing. IEEE Trans. on CAD of Integrated Circuits and Systems 22(10): 1432-1442 (2003)
7		George A. Constantinides: Review of Computer arithmetic algorithms by Israel Koren. A.K. Peters. SIGACT News 34(3): 13-15 (2003)
	2002
6		George A. Constantinides, Peter Y. K. Cheung, Wayne Luk: Optimum Wordlength Allocation. FCCM 2002: 219-228
5		George A. Constantinides, Gerhard J. Woeginger: The complexity of multiple wordlength assignment. Appl. Math. Lett. 15(2): 137-140 (2002)
	2001
4		George A. Constantinides, Peter Y. K. Cheung, Wayne Luk: Heuristic datapath allocation for multiple wordlength systems. DATE 2001: 791-797
	2000
3		George A. Constantinides, Peter Y. K. Cheung, Wayne Luk: Multiple Precision for Resource Minimization. FCCM 2000: 307-308
2		George A. Constantinides, Peter Y. K. Cheung, Wayne Luk: Multiple-Wordlength Resource Binding. FPL 2000: 646-655
	1999
1		George A. Constantinides, Peter Y. K. Cheung, Wayne Luk: Synthia: Synthesis of Interacting Automata Targeting LUT-based FPGAs. FPL 1999: 323-332

Coauthor Index

1	Su-Shin Ang	[45] [48] [54] [57]
2	Maria E. Angelopoulou	[67] [68]
3	Samuel Bayliss	[108] [112]
4	David Boland	[61] [87] [92] [94] [95] [109] [113] [114]
5	Vanderlei Bonato	[52] [59] [66] [70]
6	Christos-Savvas Bouganis	[24] [29] [30] [35] [65] [67] [68] [69] [77] [80] [85] [91]
7	Nicola Campregher	[27] [34] [40] [46]
8	Peter Y. K. Cheung	[1] [2] [3] [4] [6] [8] [9] [10] [11] [13] [14] [15] [16] [17] [18] [20] [21] [22] [23] [24] [25] [27] [28] [30] [31] [32] [33] [34] [35] [38] [39] [40] [43] [46] [47] [48] [50] [51] [53] [54] [55] [57] [58] [60] [62] [63] [67] [68] [69] [71] [72] [73] [75] [78] [79] [81] [83] [98] [101]
9	Ray C. C. Cheung (Ray Chak-Chung Cheung)	[36]
10	Jonathan A. Clarke	[26] [38] [44] [53] [60] [73]
11	José Gabriel F. Coutinho (José Gabriel de Figueiredo Coutinho)	[74]
12	Theo Drane	[103]
13	Chun Te Ewe	[16] [31]
14	Altaf Abdul Gaffar	[26] [36] [38]
15	Ammar Hasan	[89] [105]
16	Juan Luis Jerez	[84] [102] [104] [111]
17	Bryn Ll. Jones	[99]
18	Asma Kahoul	[78] [79]
19	Nachiket Kapre	[115]
20	Eric C. Kerrigan	[76] [84] [89] [90] [99] [100] [102] [104] [105] [106] [111]
21	Adam B. Kinsman	[96]
22	Christophe Le Lann	[109]
23	Dong-U Lee	[36]
24	Philip Heng Wai Leong	[41]
25	Joshua M. Levine	[101]
26	Keck Voon Ling	[100] [106]
27	Qiang Liu	[42] [55] [62] [63] [71] [72] [74] [86] [88] [98] [110]
28	Stefano Longo	[100] [106]
29	Antonio Roldao Lopes	[64] [76] [82] [93]
30	Wayne Luk	[1] [2] [3] [4] [6] [8] [9] [11] [17] [20] [21] [22] [36] [39] [48] [51] [54] [57] [74] [86] [88] [110]
31	Wai-Kei Mak	[56]
32	Manouk V. Manoukian	[107]
33	Eduardo Marques	[52] [59] [66] [70]
34	Kostas Masselos (Konstantinos Masselos)	[41] [42] [55] [62] [63] [71] [72] [98]
35	Oskar Mencer	[36]
36	Abunaser Miah	[19]
37	Gareth W. Morris	[18] [25] [50]
38	Nicola Nicolici	[96] [97]
39	Sung-Boem Park	[69]
40	Iosifina Pournara	[29]
41	Abid Rafique	[115]
42	Chalermpol Saiprasert	[65] [77] [80] [85] [91]
43	N. Pete Sedcole	[11] [17] [20] [39] [51]
44	Amir Shahzad	[76] [90] [99]
45	Nalin Sidahao	[10] [15] [19] [23] [32]
46	Alastair M. Smith	[28] [33] [43] [47] [58] [60] [75] [78] [79] [81] [83]
47	José T. de Sousa	[13] [14]
48	Edward A. Stott	[101]
49	Xuan You Tan	[114]
50	Tim Todman (Timothy John Todman)	[74] [86] [88] [110]
51	Kieron Turkington	[41]
52	Milan Vasilko	[27] [34] [40] [46]
53	Theerayod Wiangtong	[56]
54	Gerhard J. Woeginger	[5]

Colors in the list of coauthors

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