 | 2011 |
|---|
| 9 |       | Jacques Henri Collet,
Piotr Zajac,
Mihalis Psarakis,
Dimitris Gizopoulos:
Chip Self-Organization and Fault Tolerance in Massively Defective Multicore Arrays.
IEEE Trans. Dependable Sec. Comput. 8(2): 207-217 (2011) |
| 2009 |
|---|
| 8 | | Eleftherios Kolonis,
Michael Nicolaidis,
Dimitris Gizopoulos,
Mihalis Psarakis,
Jacques Henri Collet,
Piotr Zajac:
Enhanced self-configurability and yield in multicore grids.
IOLTS 2009: 75-80 |
| 2008 |
|---|
| 7 | | Piotr Zajac,
Jacques Henri Collet,
Andrzej Napieralski:
Self-Configuration and Reachability Metrics in Massively Defective Multiport Chips.
IOLTS 2008: 219-224 |
| 2007 |
|---|
| 6 | | Piotr Zajac,
Jacques Henri Collet:
Production Yield and Self-Configuration in the Future Massively Defective Nanochips.
DFT 2007: 197-205 |
| 5 | | Jacques Henri Collet,
Piotr Zajac:
Resilience, Production Yield and Self-Configuration in the Future Massively Defective Nanochips.
IOLTS 2007: 259 |
| 2006 |
|---|
| 4 | | Jacques Henri Collet,
Piotr Zajac,
Yves Crouzet,
Andrzej Napieralski:
Contribution of Communications to Dependability in Massively-Defective General-Purpose Nanoarchitectures.
IOLTS 2006: 219-228 |
| 2005 |
|---|
| 3 | | Yves Crouzet,
Jacques Henri Collet,
Jean Arlat:
Mitigating Soft Errors to Prevent a Hard Threat to Dependable Computing.
IOLTS 2005: 295-298 |
| 1999 |
|---|
| 2 | | Wissam Hlayhel,
Jacques Henri Collet,
Laurent Fesquet:
Implementing Snoop-Coherence Protocol for Future SMP Architectures.
Euro-Par 1999: 745-752 |
| 1998 |
|---|
| 1 | | Wissam Hlayhel,
Daniel Litaize,
Laurent Fesquet,
Jacques Henri Collet:
Optical versus Electronic Bus for Address-Transactions in Future SMP Architectures.
IEEE PACT 1998: 22-29 |
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