Josep M. Codina

	2011
14		Abhishek Deb, Josep M. Codina, Antonio González: SoftHV: a HW/SW co-designed processor with horizontal and vertical fusion. Conf. Computing Frontiers 2011: 1
	2009
13		Carlos Madriles, Pedro López, Josep M. Codina, Enric Gibert, Fernando Latorre, Alejandro Martínez, Raúl Martínez, Antonio González: Boosting single-thread performance in multi-core systems through fine-grain multi-threading. ISCA 2009: 474-483
12		Carlos Madriles, Pedro López, Josep M. Codina, Enric Gibert, Fernando Latorre, Alejandro Martínez, Raúl Martínez, Antonio González: Anaphase: A Fine-Grain Thread Decomposition Scheme for Speculative Multithreading. PACT 2009: 15-25
11		Alex Aletà, Josep M. Codina, F. Jesús Sánchez, Antonio González, David R. Kaeli: AGAMOS: A Graph-Based Approach to Modulo Scheduling for Clustered Microarchitectures. IEEE Trans. Computers 58(6): 770-783 (2009)
	2008
10		Qiong Cai, Josep M. Codina, José González, Antonio González: A software-hardware hybrid steering mechanism for clustered microarchitectures. IPDPS 2008: 1-12
	2007
9		Alex Aletà, Josep M. Codina, Antonio González, David R. Kaeli: Heterogeneous Clustered VLIW Microarchitectures. CGO 2007: 354-366
8		Josep M. Codina, F. Jesús Sánchez, Antonio González: Virtual Cluster Scheduling Through the Scheduling Graph. CGO 2007: 89-101
	2005
7		Alex Aletà, Josep M. Codina, Antonio González, David R. Kaeli: Demystifying on-the-fly spill code. PLDI 2005: 180-189
	2004
6		Alex Aletà, Josep M. Codina, Antonio González, David R. Kaeli: Removing communications in clustered microarchitectures through instruction replication. TACO 1(2): 127-151 (2004)
	2003
5		Alex Aletà, Josep M. Codina, Antonio González, David R. Kaeli: Instruction Replication for Clustered Microarchitectures. MICRO 2003: 326-338
	2002
4		Josep M. Codina, Josep Llosa, Antonio González: A comparative study of modulo scheduling techniques. ICS 2002: 97-106
3		Alex Aletà, Josep M. Codina, F. Jesús Sánchez, Antonio González, David R. Kaeli: Exploiting Pseudo-Schedules to Guide Data Dependence Graph Partitioning. IEEE PACT 2002: 281-290
	2001
2		Josep M. Codina, F. Jesús Sánchez, Antonio González: A Unified Modulo Scheduling and Register Allocation Technique for Clustered Processors. IEEE PACT 2001: 175-184
1		Alex Aletà, Josep M. Codina, F. Jesús Sánchez, Antonio González: Graph-partitioning based instruction scheduling for clustered processors. MICRO 2001: 150-159

Coauthor Index

1	Alex Aletà	[1] [3] [5] [6] [7] [9] [11]
2	Qiong Cai	[10]
3	Abhishek Deb	[14]
4	Enric Gibert	[12] [13]
5	Antonio González	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14]
6	José González	[10]
7	David R. Kaeli	[3] [5] [6] [7] [9] [11]
8	Fernando Latorre	[12] [13]
9	Josep Llosa	[4]
10	Pedro López (Pedro Juan López Rodríguez)	[12] [13]
11	Carlos Madriles	[12] [13]
12	Alejandro Martínez	[12] [13]
13	Raúl Martínez	[12] [13]
14	F. Jesús Sánchez	[1] [2] [3] [8] [11]

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