Slawomir Cichon

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2006

2 Slawomir Cichon, Marek Gorgon, Miroslaw Pac: Handel-C Design Enhancement for FPGA-Based DV Decoder. ARC 2006: 128-133

2005

1 Marek Gorgon, Slawomir Cichon, Miroslaw Pac: Real-time Handel-C Based Implementation of DV Decoder. FPL 2005: 130-135

	2006
2		Slawomir Cichon, Marek Gorgon, Miroslaw Pac: Handel-C Design Enhancement for FPGA-Based DV Decoder. ARC 2006: 128-133
	2005
1		Marek Gorgon, Slawomir Cichon, Miroslaw Pac: Real-time Handel-C Based Implementation of DV Decoder. FPL 2005: 130-135

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