Jin-Gyun Chung

	2011
20		Kyung-Ju Cho, Jin-Gyun Chung, Hwan-Yong Kim, Gwang-Jun Kim, Dae-Ik Kim, Yong-Kab Kim: Fixed-Width Modified Booth Multiplier Design Based on Error Bound Analysis. FGIT-MulGraB (2) 2011: 248-256
19		In-Gul Jang, Zhe-Yan Piao, Ze-Hua Dong, Jin-Gyun Chung, Kang-Yoon Lee: Low-power FFT design for NC-OFDM in cognitive radio systems. ISCAS 2011: 2449-2452
	2010
18		Yong-Eun Kim, Kyung-Ju Cho, Jin-Gyun Chung, Xinming Huang: CSD-Based Programmable Multiplier Design for Predetermined Coefficient Groups. IEICE Transactions 93-A(1): 324-326 (2010)
17		Yong-Eun Kim, Kyung-Ju Cho, Jin-Gyun Chung, Xinming Huang: Fixed-Width Group CSD Multiplier Design. IEICE Transactions 93-D(6): 1497-1503 (2010)
	2009
16		Ki-Sang Jung, Kang-Jik Kim, Yong-Eun Kim, Jin-Gyun Chung, Ki-Hyun Pyun, Jong-Yeol Lee, Hang-Geun Jeong, Seong Ik Cho: The ROM Design with Half Grouping Compression Method for Chip Area and Power Consumption Reduction. IEICE Transactions 92-C(3): 352-355 (2009)
	2008
15		Yong-Eun Kim, Su-Hyun Cho, Jin-Gyun Chung: Modified CSD group multiplier design for predetermined coefficient groups. ISCAS 2008: 3362-3365
	2007
14		Sun-Ah Hong, Yong-Eun Kim, Jin-Gyun Chung, Sung-Chul Lee: Efficient Squarer Design Using Group Partial Products. SiPS 2007: 146-150
13		Kyung-Ju Cho, Yi-Nan Xu, Jin-Gyun Chung: Hardware Efficient QR Decomposition for GDFE. SiPS 2007: 412-417
12		Yong-Eun Kim, Kyung-Ju Cho, Jin-Gyun Chung: Low Power Small Area Modified Booth Multiplier Design for Predetermined Coefficients. IEICE Transactions 90-A(3): 694-697 (2007)
11		Kyung-Ju Cho, Jin-Gyun Chung: Adaptive Error Compensation for Low Error Fixed-Width Squarers. IEICE Transactions 90-D(3): 621-626 (2007)
	2004
10		Dae-Ik Kim, Sung-Hwan Bae, Mike Myung-Ok Lee, Jin-Gyun Chung: Area Efficient and Low Power Pipelined IIR Filter Design for Intelligent Integrated Photonic System. HSNMC 2004: 842-847
9		Kyung-Ju Cho, Kwang-Chul Lee, Jin-Gyun Chung, Keshab K. Parhi: Design of low-error fixed-width modified booth multiplier. IEEE Trans. VLSI Syst. 12(5): 522-531 (2004)
	2003
8		Ji-Suk Park, Byeong-Kuk Kim, Jin-Gyun Chung, Keshab K. Parhi: High-speed tunable fractional-delay allpass filter structure. ISCAS (4) 2003: 165-168
7		Hojun Kim, Jin-Gyun Chung: Minimizing switching activity in input word by offset and its low power applications for FIR filters. ISCAS (5) 2003: 297-300
	2002
6		Sang-Min Kim, Jin-Gyun Chung, Keshab K. Parhi: Design of low error CSD fixed-width multiplier. ISCAS (1) 2002: 69-72
5		Jin-Gyun Chung, Keshab K. Parhi: Frequency Spectrum Based Low-Area Low-Power Parallel FIR Filter Design. EURASIP J. Adv. Sig. Proc. 2002(9): 944-953 (2002)
	2001
4		Ki-Cheol Tae, Jin-Gyun Chung, Dae-Ik Kim: Noise generation system using DCT. ISCAS (4) 2001: 29-32
	1995
3		Jin-Gyun Chung, Keshab K. Parhi: Synthesis and Pipelining of Ladder Wave Digital Filters in Digital Domain. ISCAS 1995: 77-80
	1994
2		Jin-Gyun Chung, Keshab K. Parhi: Pipelining of lattice IIR digital filters. IEEE Transactions on Signal Processing 42(4): 751-761 (1994)
	1993
1		Jin-Gyun Chung, Keshab K. Parhi: The scaled normalized lattice digital filter. ISCAS 1993: 483-486

Coauthor Index

1	Sung-Hwan Bae	[10]
2	Kyung-Ju Cho	[9] [11] [12] [13] [17] [18] [20]
3	Seong Ik Cho	[16]
4	Su-Hyun Cho	[15]
5	Ze-Hua Dong	[19]
6	Sun-Ah Hong	[14]
7	Xinming Huang	[17] [18]
8	In-Gul Jang	[19]
9	Hang-Geun Jeong	[16]
10	Ki-Sang Jung	[16]
11	Byeong-Kuk Kim	[8]
12	Dae-Ik Kim	[4] [10] [20]
13	Gwang-Jun Kim	[20]
14	Hojun Kim	[7]
15	Hwan-Yong Kim	[20]
16	Kang-Jik Kim	[16]
17	Sang-Min Kim	[6]
18	Yong-Eun Kim	[12] [14] [15] [16] [17] [18]
19	Yong-Kab Kim	[20]
20	Jong-Yeol Lee	[16]
21	Kang-Yoon Lee	[19]
22	Kwang-Chul Lee	[9]
23	Mike Myung-Ok Lee	[10]
24	Sung-Chul Lee	[14]
25	Keshab K. Parhi	[1] [2] [3] [5] [6] [8] [9]
26	Ji-Suk Park	[8]
27	Zhe-Yan Piao	[19]
28	Ki-Hyun Pyun	[16]
29	Ki-Cheol Tae	[4]
30	Yi-Nan Xu	[13]

Colors in the list of coauthors

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