 | 2012 |
| 10 |  | Eric S. Chung,
Michael Papamichael,
Gabriel Weisz,
James C. Hoe,
Ken Mai:
Prototype and evaluation of the CoRAM memory architecture for FPGA-based computing.
FPGA 2012: 139-142 |
| 2011 |
| 9 |  | Eric S. Chung,
James C. Hoe,
Ken Mai:
CoRAM: an in-fabric memory architecture for FPGA-based computing.
FPGA 2011: 97-106 |
| 2010 |
| 8 |  | Eric S. Chung,
Peter A. Milder,
James C. Hoe,
Ken Mai:
Single-Chip Heterogeneous Computing: Does the Future Include Custom Logic, FPGAs, and GPGPUs?
MICRO 2010: 225-236 |
| 7 |  | Eric S. Chung,
James C. Hoe:
High-Level Design and Validation of the BlueSPARC Multithreaded Processor.
IEEE Trans. on CAD of Integrated Circuits and Systems 29(10): 1459-1470 (2010) |
| 2009 |
| 6 |  | Eric S. Chung,
James C. Hoe:
Implementing a high-performance multithreaded microprocessor: A case study in high-level design and validation.
MEMOCODE 2009: 98-107 |
| 5 |  | Eric S. Chung,
Michael Papamichael,
Eriko Nurvitadhi,
James C. Hoe,
Ken Mai,
Babak Falsafi:
ProtoFlex: Towards Scalable, Full-System Multiprocessor Simulations Using FPGAs.
TRETS 2(2): (2009) |
| 2008 |
| 4 |  | Eric S. Chung,
Eriko Nurvitadhi,
James C. Hoe,
Babak Falsafi,
Ken Mai:
A complexity-effective architecture for accelerating full-system multiprocessor simulations using FPGAs.
FPGA 2008: 77-86 |
| 2007 |
| 3 |  | Eric S. Chung,
Eriko Nurvitadhi,
James C. Hoe,
Babak Falsafi,
Ken Mai:
PROToFLEX: FPGA-accelerated Hybrid Functional Simulator.
IPDPS 2007: 1-6 |
| 2005 |
| 2 |  | Brian T. Gold,
Jangwoo Kim,
Jared C. Smolens,
Eric S. Chung,
Vasileios Liaskovitis,
Eriko Nurvitadhi,
Babak Falsafi,
James C. Hoe,
Andreas Nowatzyk:
TRUSS: A Reliable, Scalable Server Architecture.
IEEE Micro 25(6): 51-59 (2005) |
| 2004 |
| 1 |  | Eric S. Chung,
Jason I. Hong,
James Lin,
Madhu K. Prabaker,
James A. Landay,
Alan L. Liu:
Development and evaluation of emerging design patterns for ubiquitous computing.
Conference on Designing Interactive Systems 2004: 233-242 |