 | 2011 |
| 10 |  | Ching-Che Chung,
Cheng-Ruei Yang:
An Autocalibrated All-Digital Temperature Sensor for On-Chip Thermal Monitoring.
IEEE Trans. on Circuits and Systems 58-II(2): 105-109 (2011) |
| 9 |  | Ching-Che Chung,
Chiun-Yao Ko,
Sung-En Shen:
Built-in Self-Calibration Circuit for Monotonic Digitally Controlled Oscillator Design in 65-nm CMOS Technology.
IEEE Trans. on Circuits and Systems 58-II(3): 149-153 (2011) |
| 8 |  | Ching-Che Chung,
Chiun-Yao Ko:
A Fast Phase Tracking ADPLL for Video Pixel Clock Generation in 65 nm CMOS Technology.
J. Solid-State Circuits 46(10): 2300-2311 (2011) |
| 7 |  | Ching-Che Chung,
Jui-Yuan Yu,
Shiou-Ru Jang,
Chen-Yi Lee:
A 90 nm All-digital Smart Temperature Sensor with Wireless Body Area Network Baseband Transceiver for Biotelemetry Applications.
Signal Processing Systems 64(2): 241-248 (2011) |
| 2010 |
| 6 |  | Ching-Che Chung,
Cheng-Ruei Yang:
An all-digital smart temperature sensor with auto-calibration in 65nm CMOS technology.
ISCAS 2010: 4089-4092 |
| 2008 |
| 5 |  | Jui-Yuan Yu,
Ching-Che Chung,
Chen-Yi Lee:
A Symbol-Rate Timing Synchronization Method for Low Power Wireless OFDM Systems.
IEEE Trans. on Circuits and Systems 55-II(9): 922-926 (2008) |
| 2007 |
| 4 |  | Jui-Yuan Yu,
Juinn-Ting Chen,
Mei-Hui Yang,
Ching-Che Chung,
Chen-Yi Lee:
An all-digital phase-frequency tunable clock generator for wireless OFDM communications systems.
SoCC 2007: 305-308 |
| 2006 |
| 3 |  | Duo Sheng,
Ching-Che Chung,
Chen-Yi Lee:
A Fast-Lock-In ADPLL with High-Resolution and Low-Power DCO for SoC Applications.
APCCAS 2006: 105-108 |
| 2 |  | Tsu-Ming Liu,
Ching-Che Chung,
Chen-Yi Lee,
Ting-An Lin,
Sheng-Zen Wang:
Design of a 125muW, fully-scalable MPEG-2 and H.264/AVC video decoder for mobile applications.
DAC 2006: 288-289 |
| 2005 |
| 1 |  | Pao-Lung Chen,
Ching-Che Chung,
Chen-Yi Lee:
An all-digital PLL with cascaded dynamic phase average loop for wide multiplication range applications.
ISCAS (5) 2005: 4875-4878 |