Ki Chul Chun

	2012
6		Ki Chul Chun, Pulkit Jain, Tae-Ho Kim, Chris H. Kim: A 667 MHz Logic-Compatible Embedded DRAM Featuring an Asymmetric 2T Gain Cell for High Speed On-Die Caches. J. Solid-State Circuits 47(2): 547-559 (2012)
	2011
5		Ki Chul Chun, Wei Zhang, Pulkit Jain, Chris H. Kim: A 700MHz 2T1C embedded DRAM macro in a generic logic process with no boosted supplies. ISSCC 2011: 506-507
4		Ki Chul Chun, Pulkit Jain, Jung Hwa Lee, Chris H. Kim: A 3T Gain Cell Embedded DRAM Utilizing Preferential Boosting for High Density and Low Power On-Die Caches. J. Solid-State Circuits 46(6): 1495-1505 (2011)
	2010
3		Ki Chul Chun, Pulkit Jain, Chris H. Kim: Logic-compatible embedded DRAM design for memory intensive low power systems. ISCAS 2010: 277-280
2		Wei Zhang, Ki Chul Chun, Chris H. Kim: Variation aware performance analysis of gain cell embedded DRAMs. ISLPED 2010: 19-24
	2009
1		Ki Chul Chun, Pulkit Jain, Chris H. Kim: A 0.9V, 65nm logic-compatible embedded DRAM with > 1ms data retention time and 53% less static power than a power-gated SRAM. ISLPED 2009: 119-120

Coauthor Index

1	Pulkit Jain	[1] [3] [4] [5] [6]
2	Chris H. Kim	[1] [2] [3] [4] [5] [6]
3	Tae-Ho Kim	[6]
4	Jung Hwa Lee	[4]
5	Wei Zhang	[2] [5]

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