 | 2011 |
| 16 |  | Wei-Kai Chan,
Yu-Hsiang Tseng,
Pei-Kuei Tsung,
Tzu-Der Chuang,
Yi-Min Tsai,
Wei-Yin Chen,
Liang-Gee Chen,
Shao-Yi Chien:
ReSSP: A 5.877 TOPS/W Reconfigurable Smart-camera Stream Processor.
CICC 2011: 1-4 |
| 15 |  | Pei-Kuei Tsung,
Pin-Chih Lin,
Kuan-Yu Chen,
Tzu-Der Chuang,
Hsin-Jung Yang,
Shao-Yi Chien,
Li-Fu Ding,
Wei-Yin Chen,
Chih-Chi Cheng,
Tung-Chien Chen,
Liang-Gee Chen:
A 216fps 4096×2160p 3DTV set-top box SoC for free-viewpoint 3DTV applications.
ISSCC 2011: 124-126 |
| 2010 |
| 14 |  | Tzu-Der Chuang,
Pei-Kuei Tsung,
Pin-Chih Lin,
Lo-Mei Chang,
Tsung-Chuan Ma,
Yi-Hau Chen,
Liang-Gee Chen:
Low bandwidth decoder framework for H.264/AVC scalable extension.
ISCAS 2010: 2960-2963 |
| 13 |  | Tzu-Der Chuang,
Pei-Kuei Tsung,
Pin-Chih Lin,
Lo-Mei Chang,
Tsung-Chuan Ma,
Yi-Hau Chen,
Liang-Gee Chen:
A 59.5mW scalable/multi-view video decoder chip for Quad/3D Full HDTV and video streaming applications.
ISSCC 2010: 330-331 |
| 12 |  | Tse-Wei Chen,
Yi-Ling Chen,
Teng-Yuan Cheng,
Chi-Sun Tang,
Pei-Kuei Tsung,
Tzu-Der Chuang,
Liang-Gee Chen,
Shao-Yi Chien:
A multimedia semantic analysis SoC (SASoC) with machine-learning engine.
ISSCC 2010: 338-339 |
| 11 |  | Pei-Kuei Tsung,
Li-Fu Ding,
Wei-Yin Chen,
Tzu-Der Chuang,
Yu-Han Chen,
Pai-Heng Hsiao,
Shao-Yi Chien,
Liang-Gee Chen:
Video encoder design for high-definition 3D video communication systems.
IEEE Communications Magazine 48(4): 76-86 (2010) |
| 10 |  | Li-Fu Ding,
Wei-Yin Chen,
Pei-Kuei Tsung,
Tzu-Der Chuang,
Pai-Heng Hsiao,
Yu-Han Chen,
Hsu-Kuang Chiu,
Shao-Yi Chien,
Liang-Gee Chen:
A 212 MPixels/s 4096 ˟ 2160p Multiview Video Encoder Chip for 3D/Quad Full HDTV Applications.
J. Solid-State Circuits 45(1): 46-58 (2010) |
| 9 |  | Tzu-Der Chuang,
Yu-Jen Chen,
Yi-Hau Chen,
Shao-Yi Chien,
Liang-Gee Chen:
Architecture Design of Fine Grain Quality Scalable Encoder with CABAC for H.264/AVC Scalable Extension.
Signal Processing Systems 60(3): 363-375 (2010) |
| 2009 |
| 8 |  | Tzu-Der Chuang,
Lo-Mei Chang,
Tsai-Wei Chiu,
Yi-Hau Chen,
Liang-Gee Chen:
Bandwidth-efficient cache-based motion compensation architecture with DRAM-friendly data access control.
ICASSP 2009: 2009-2012 |
| 7 |  | Pei-Kuei Tsung,
Wei-Yin Chen,
Li-Fu Ding,
Chuan-Yung Tsai,
Tzu-Der Chuang,
Liang-Gee Chen:
Single-iteration full-search fractional motion estimation for quad full HD H.264/AVC encoding.
ICME 2009: 9-12 |
| 6 |  | Pin-Chih Lin,
Tzu-Der Chuang,
Liang-Gee Chen:
A Branch Selection Multi-symbol High throughput CABAC Decoder Architecture for H.264/AVC.
ISCAS 2009: 365-368 |
| 5 |  | Li-Fu Ding,
Wei-Yin Chen,
Pei-Kuei Tsung,
Tzu-Der Chuang,
Hsu-Kuang Chiu,
Yu-Han Chen,
Pai-Heng Hsiao,
Shao-Yi Chien,
Tung-Chien Chen,
Ping-Chih Lin,
Chia-Yu Chang,
Liang-Gee Chen:
A 212MPixels/s 4096×2160p multiview video encoder chip for 3D/quad HDTV applications.
ISSCC 2009: 154-155 |
| 2008 |
| 4 |  | Ching-Yen Chien,
Sheng-Chieh Huang,
Shih-Hsiang Lin,
Yu-Chieh Huang,
Yi-Cheng Chen,
Lei-Chun Chou,
Tzu-Der Chuang,
Yu-Wei Chang,
Chia-Ho Pan,
Liang-Gee Chen:
A 100 MHz 1920×1080 HD-Photo 20 frames/sec JPEG XR encoder design.
ICIP 2008: 1384-1387 |
| 3 |  | Yi-Hau Chen,
Tzu-Der Chuang,
Yu-Han Chen,
Chen-Han Tsai,
Liang-Gee Chen:
Frame-parallel design strategy for high definition B-frame H.264/AVC encoder.
ISCAS 2008: 29-32 |
| 2 |  | Yi-Hau Chen,
Chih-Chi Cheng,
Tzu-Der Chuang,
Ching-Yeh Chen,
Shao-Yi Chien,
Liang-Gee Chen:
Efficient Architecture Design of Motion-Compensated Temporal Filtering/Motion Compensated Prediction Engine.
IEEE Trans. Circuits Syst. Video Techn. 18(1): 98-109 (2008) |
| 2007 |
| 1 |  | Yu-Jen Chen,
Yi-Hau Chen,
Tzu-Der Chuang,
Chung-Te Li,
Shao-Yi Chien,
Liang-Gee Chen:
Architecture Design of Fine Grain SNR Scalable Encoder with CABAC for H.264/AVC Scalable Extension.
SiPS 2007: 515-520 |