Li-Pu Chuang

	2008
2		Li-Pu Chuang, Ming-Hung Chang, Po-Tsang Huang, Chih-Hao Kan, Wei Hwang: A 5.2mW all-digital fast-lock self-calibrated multiphase delay-locked loop. ISCAS 2008: 3342-3345
1		Ming-Hung Chang, Li-Pu Chuang, I-Ming Chang, Wei Hwang: A 300-mV 36-muW multiphase dual digital clock output generator with self-calibration. SoCC 2008: 97-100

Coauthor Index

1	I-Ming Chang	[1]
2	Ming-Hung Chang	[1] [2]
3	Po-Tsang Huang	[2]
4	Wei Hwang	[1] [2]
5	Chih-Hao Kan	[2]

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