Ching-Te Chuang

	2011
51		Vita Pi-Ho Hu, Ming-Long Fan, Pin Su, Ching-Te Chuang: Analysis of power-performance for ultra-thin-body GeOI logic circuits. ISLPED 2011: 115-120
50		Yi-Wei Chiu, Jihi-Yu Lin, Ming-Hsien Tu, Shyh-Jye Jou, Ching-Te Chuang: 8T single-ended sub-threshold SRAM with cross-point data-aware write operation. ISLPED 2011: 169-174
49		Hao-I Yang, Shih-Chi Yang, Mao-Chih Hsia, Yung-Wei Lin, Yi-Wei Lin, Chien-Hen Chen, Chi-Shin Chang, Geng-Cing Lin, Yin-Nien Chen, Ching-Te Chuang, Wei Hwang, Shyh-Jye Jou, Nan-Chun Lien, Hung-Yu Li, Kuen-Di Lee, Wei-Chiang Shih, Ya-Ping Wu, Wen-Ta Lee, Chih-Chiang Hsu: A high-performance low VMIN 55nm 512Kb disturb-free 8T SRAM with adaptive VVSS control. SoCC 2011: 197-200
48		Saibal Mukhopadhyay, Rahul M. Rao, Jae-Joon Kim, Ching-Te Chuang: SRAM Write-Ability Improvement With Transient Negative Bit-Line Voltage. IEEE Trans. VLSI Syst. 19(1): 24-32 (2011)
47		Hao-I Yang, Wei Hwang, Ching-Te Chuang: Impacts of NBTI/PBTI and Contact Resistance on Power-Gated SRAM With High-kappa Metal-Gate Devices. IEEE Trans. VLSI Syst. 19(7): 1192-1204 (2011)
46		Hao-I Yang, Shyh-Chyi Yang, Wei Hwang, Ching-Te Chuang: Impacts of NBTI/PBTI on Timing Control Circuits and Degradation Tolerant Design in Nanoscale CMOS SRAM. IEEE Trans. on Circuits and Systems 58-I(6): 1239-1251 (2011)
45		Hao-I Yang, Wei Hwang, Ching-Te Chuang: Impacts of gate-oxide breakdown on power-gated SRAM. Microelectronics Journal 42(1): 101-112 (2011)
	2010
44		Niladri Narayan Mojumder, Saibal Mukhopadhyay, Jae-Joon Kim, Ching-Te Chuang, Kaushik Roy: Self-Repairing SRAM Using On-Chip Detection and Compensation. IEEE Trans. VLSI Syst. 18(1): 75-84 (2010)
43		Ming-Hsien Tu, Jihi-Yu Lin, Ming-Chien Tsai, Shyh-Jye Jou, Ching-Te Chuang: Single-Ended Subthreshold SRAM With Asymmetrical Write/Read-Assist. IEEE Trans. on Circuits and Systems 57-I(12): 3039-3047 (2010)
	2009
42		Aditya Bansal, Rama N. Singh, Rouwaida Kanj, Saibal Mukhopadhyay, Jin-Fuw Lee, Emrah Acar, Amith Singhee, Keunwoo Kim, Ching-Te Chuang, Sani R. Nassif, Fook-Luen Heng, Koushik K. Das: Yield estimation of SRAM circuits using "Virtual SRAM Fab". ICCAD 2009: 631-636
41		Ching-Te Chuang: Modeling, Analysis, and TCAD of Nanoscale Devices and Circuits. ISCAS 2009: 2305-2308
40		Hao-I Yang, Ching-Te Chuang, Wei Hwang: Impacts of NBTI and PBTI on Power-gated SRAM with High-k Metal-gate Devices. ISCAS 2009: 377-380
39		Amlan Ghosh, Richard B. Brown, Rahul M. Rao, Ching-Te Chuang: A Precise Negative Bias Temperature Instability Sensor using Slew-rate Monitor Circuitry. ISCAS 2009: 381-384
38		Vita Pi-Ho Hu, Yu-Sheng Wu, Ming-Long Fan, Pin Su, Ching-Te Chuang: Design and analysis of ultra-thin-body SOI based subthreshold SRAM. ISLPED 2009: 9-14
37		Jihi-Yu Lin, Ming-Hsien Tu, Ming-Chien Tsai, Shyh-Jye Jou, Ching-Te Chuang: Asymmetrical Write-assist for single-ended SRAM operation. SoCC 2009: 101-104
36		Aditya Bansal, Rahul M. Rao, Jae-Joon Kim, Sufi Zafar, James H. Stathis, Ching-Te Chuang: Impacts of NBTI and PBTI on SRAM static/dynamic noise margins and cell failure probability. Microelectronics Reliability 49(6): 642-649 (2009)
	2008
35		Aditya Bansal, Rama N. Singh, Saibal Mukhopadhyay, Geng Han, Fook-Luen Heng, Ching-Te Chuang: Pre-Si estimation and compensation of SRAM layout deficiencies to achieve target performance and yield. ICCD 2008: 457-462
34		Saibal Mukhopadhyay, Rahul M. Rao, Jae-Joon Kim, Ching-Te Chuang: Capacitive coupling based transient negative bit-line voltage (Tran-NBL) scheme for improving write-ability of SRAM design in nanometer technologies. ISCAS 2008: 384-387
33		Saibal Mukhopadhyay, Rajiv V. Joshi, Keunwoo Kim, Ching-Te Chuang: Variability Analysis for sub-100nm PD/SOI Sense-Amplifier. ISQED 2008: 488-491
32		Amlan Ghosh, Rahul M. Rao, Ching-Te Chuang, Richard B. Brown: On-Chip Process Variation Detection and Compensation Using Delay and Slew-Rate Monitoring Circuits. ISQED 2008: 815-820
31		Aditya Bansal, Jae-Joon Kim, Keunwoo Kim, Saibal Mukhopadhyay, Ching-Te Chuang, Kaushik Roy: Optimal Dual-VT Design in Sub-100 Nanometer PDSOI and Double-Gate Technologies. VLSI Design 2008: 125-130
30		Amlan Ghosh, Rahul M. Rao, Jae-Joon Kim, Ching-Te Chuang, Richard B. Brown: On-Chip Process Variation Detection Using Slew-Rate Monitoring Circuit. VLSI Design 2008: 143-149
29		Niladri Narayan Mojumder, Saibal Mukhopadhyay, Jae-Joon Kim, Ching-Te Chuang, Kaushik Roy: Design and Analysis of a Self-Repairing SRAM with On-Chip Monitor and Compensation Circuitry. VTS 2008: 101-106
28		Jente B. Kuang, Keunwoo Kim, Ching-Te Chuang, Hung C. Ngo, Fadi H. Gebara, Kevin J. Nowka: Circuit Techniques Utilizing Independent Gate Control in Double-Gate Technologies. IEEE Trans. VLSI Syst. 16(12): 1657-1665 (2008)
27		Koushik K. Das, Ching-Te Chuang, Richard B. Brown: Reducing parasitic BJT effects in partially depleted SOI digital logic circuits. Microelectronics Journal 39(2): 275-285 (2008)
	2007
26		Saibal Mukhopadhyay, Keunwoo Kim, Ching-Te Chuang: Design and analysis of Thin-BOX FD/SOI devices for low-power and stable SRAM in sub-50nm technologies. ISLPED 2007: 20-25
25		Rajiv V. Joshi, Rouwaida Kanj, Keunwoo Kim, Richard Q. Williams, Ching-Te Chuang: A floating-body dynamic supply boosting technique for low-voltage sram in nanoscale PD/SOI CMOS technologies. ISLPED 2007: 8-13
24		Jie Deng, Keunwoo Kim, Ching-Te Chuang, H.-S. Philip Wong: Device Footprint Scaling for Ultra Thin Body Fully Depleted SOI. ISQED 2007: 145-152
23		Rajiv V. Joshi, Keunwoo Kim, Richard Q. Williams, Edward J. Nowak, Ching-Te Chuang: A High-Performance, Low Leakage, and Stable SRAM Row-Based Back-Gate Biasing Scheme in FinFET Technology. VLSI Design 2007: 665-672
22		Saibal Mukhopadhyay, Keunwoo Kim, Jae-Joon Kim, Shih-Hsien Lo, Rajiv V. Joshi, Ching-Te Chuang, Kaushik Roy: Estimation of gate-to-channel tunneling current in ultra-thin oxide sub-50nm double gate devices. Microelectronics Journal 38(8-9): 931-941 (2007)
	2006
21		Koushik K. Das, Shih-Hsien Lo, Ching-Te Chuang: High Performance MTCMOS Technique for Leakage Reduction in Hybrid SOI-Epitaxial Technologies with Enhanced-Mobility PFET Header. VLSI Design 2006: 758-761
20		Saibal Mukhopadhyay, Keunwoo Kim, Ching-Te Chuang, Kaushik Roy: Modeling and Analysis of Leakage Currents in Double-Gate Technologies. IEEE Trans. on CAD of Integrated Circuits and Systems 25(10): 2052-2061 (2006)
	2005
19		Saibal Mukhopadhyay, Keunwoo Kim, Ching-Te Chuang, Kaushik Roy: Modeling and analysis of total leakage currents in nanoscale double gate devices and circuits. ISLPED 2005: 8-13
18		Saibal Mukhopadhyay, Keunwoo Kim, Jae-Joon Kim, Shih-Hsien Lo, Rajiv V. Joshi, Ching-Te Chuang, Kaushik Roy: Modeling and Analysis of Gate Leakage in Ultra-thin Oxide Sub-50nm Double Gate Devices and Circuits. ISQED 2005: 410-415
17		Rajiv V. Joshi, S. S. Kang, N. Zamdmar, A. Mocuta, Ching-Te Chuang, J. A. Pascual-Gutiérrez: Direct Temperature Measurement for VLSI Circuits and 3-D Modeling of Self-Heating in Sub-0.13 mum SOI Technologies. VLSI Design 2005: 697-702
	2004
16		Keunwoo Kim, Koushik K. Das, Rajiv V. Joshi, Ching-Te Chuang: Nanoscale CMOS circuit leakage power reduction by double-gate device. ISLPED 2004: 102-107
15		Rajiv V. Joshi, K. Kroell, Ching-Te Chuang: A Novel Technique For Steady State Analysis For VLSI Circuits In Partially Depleted SOI. VLSI Design 2004: 832-
	2003
14		Kerry Bernstein, Ching-Te Chuang, Rajiv V. Joshi, Ruchir Puri: Design and CAD Challenges in sub-90nm CMOS Technologies. ICCAD 2003: 129-137
13		Koushik K. Das, Rajiv V. Joshi, Ching-Te Chuang, Peter W. Cook, Richard B. Brown: New optimal design strategies and analysis of ultra-low leakage circuits for nano-scale SOI technology. ISLPED 2003: 168-171
12		Keunwoo Kim, Rajiv V. Joshi, Ching-Te Chuang: Strained-si devices and circuits for low-power applications. ISLPED 2003: 180-183
11		Ching-Te Chuang, Rajiv V. Joshi, Ruchir Puri, Keunwoo Kim: Design Considerations of Scaled Sub-0.1 ?m PD/SOI CMOS Circuits. ISQED 2003: 153-158
10		Rajiv V. Joshi, Ching-Te Chuang, S. K. H. Fung, Fari Assaderaghi, Melanie Sherony, I. Yang, Ghavam V. Shahidi: PD/SOI SRAM performance in presence of gate-to-body tunneling current. IEEE Trans. VLSI Syst. 11(6): 1106-1113 (2003)
9		R. Rodríguez, James H. Stathis, Barry P. Linder, Rajiv V. Joshi, Ching-Te Chuang: Influence and model of gate oxide breakdown on CMOS inverters. Microelectronics Reliability 43(9-11): 1439-1444 (2003)
	2002
8		R. Rodríguez, James H. Stathis, Barry P. Linder, S. Kowalczyk, Ching-Te Chuang, Rajiv V. Joshi, Gregory A. Northrop, Kerry Bernstein, A. J. Bhavnagarwala, Salvatore Lombardo: Analysis of the effect of the gate oxide breakdown on SRAM stability. Microelectronics Reliability 42(9-11): 1445-1448 (2002)
	2001
7		Rajiv V. Joshi, Wei Hwang, Ching-Te Chuang: SOI for asynchronous dynamic circuits. ACM Great Lakes Symposium on VLSI 2001: 37-42
	2000
6		Rajiv V. Joshi, Wei Hwang, S. C. Wilson, Ching-Te Chuang: "Cool low power" 1GHz multi-port register file and dynamic latch in 1.8 V, 0.25 mum SOI and bulk technology (poster session). ISLPED 2000: 203-206
5		Rajiv V. Joshi, Wei Hwang, S. C. Wilson, Ghavam V. Shahidi, Ching-Te Chuang: A Low Power 900 MHz Register File (8 Ports, 32 Words x 64 Bits) in 1.8V, 0.25µm SOI Technology. VLSI Design 2000: 44-49
4		Ruchir Puri, Ching-Te Chuang: SOI Digital Circuits: Design Issues. VLSI Design 2000: 474-479
	1999
3		Ching-Te Chuang, Ruchir Puri: SOI Digital CMOS VLSI - a Design Perspective. DAC 1999: 709-714
2		Ruchir Puri, Ching-Te Chuang: Hysteresis effect in floating-body partially-depleted SOI CMOS domino circuits. ISLPED 1999: 223-228
	1997
1		Leon J. Sigal, James D. Warnock, Brian W. Curran, Yuen H. Chan, Peter J. Camporese, Mark D. Mayo, William V. Huott, Daniel R. Knebel, Ching-Te Chuang, James P. Eckhardt, Philip T. Wu: Circuit design techniques for the high-performance CMOS IBM S/390 Parallel Enterprise Server G4 microprocessor. IBM Journal of Research and Development 41(4&5): 489-504 (1997)

Coauthor Index

1	Emrah Acar	[42]
2	Fari Assaderaghi	[10]
3	Aditya Bansal	[31] [35] [36] [42]
4	Kerry Bernstein	[8] [14]
5	A. J. Bhavnagarwala	[8]
6	Richard B. Brown	[13] [27] [30] [32] [39]
7	Peter J. Camporese	[1]
8	Yuen H. Chan	[1]
9	Chi-Shin Chang	[49]
10	Chien-Hen Chen	[49]
11	Yin-Nien Chen	[49]
12	Yi-Wei Chiu	[50]
13	Peter W. Cook	[13]
14	Brian W. Curran	[1]
15	Koushik K. Das	[13] [16] [21] [27] [42]
16	Jie Deng	[24]
17	James P. Eckhardt	[1]
18	Ming-Long Fan	[38] [51]
19	S. K. H. Fung	[10]
20	Fadi H. Gebara	[28]
21	Amlan Ghosh	[30] [32] [39]
22	Geng Han	[35]
23	Fook-Luen Heng	[35] [42]
24	Mao-Chih Hsia	[49]
25	Chih-Chiang Hsu	[49]
26	Vita Pi-Ho Hu	[38] [51]
27	William V. Huott (Bill Huott)	[1]
28	Wei Hwang	[5] [6] [7] [40] [45] [46] [47] [49]
29	Rajiv V. Joshi	[5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [18] [22] [23] [25] [33]
30	Shyh-Jye Jou	[37] [43] [49] [50]
31	S. S. Kang	[17]
32	Rouwaida Kanj	[25] [42]
33	Jae-Joon Kim	[18] [22] [29] [30] [31] [34] [36] [44] [48]
34	Keunwoo Kim	[11] [12] [16] [18] [19] [20] [22] [23] [24] [25] [26] [28] [31] [33] [42]
35	Daniel R. Knebel	[1]
36	S. Kowalczyk	[8]
37	K. Kroell	[15]
38	Jente B. Kuang	[28]
39	Jin-Fuw Lee	[42]
40	Kuen-Di Lee	[49]
41	Wen-Ta Lee	[49]
42	Hung-Yu Li	[49]
43	Nan-Chun Lien	[49]
44	Geng-Cing Lin	[49]
45	Jihi-Yu Lin	[37] [43] [50]
46	Yi-Wei Lin	[49]
47	Yung-Wei Lin	[49]
48	Barry P. Linder	[8] [9]
49	Shih-Hsien Lo	[18] [21] [22]
50	Salvatore Lombardo	[8]
51	Mark D. Mayo	[1]
52	A. Mocuta	[17]
53	Niladri Narayan Mojumder	[29] [44]
54	Saibal Mukhopadhyay	[18] [19] [20] [22] [26] [29] [31] [33] [34] [35] [42] [44] [48]
55	Sani R. Nassif	[42]
56	Hung C. Ngo	[28]
57	Gregory A. Northrop	[8]
58	Edward J. Nowak	[23]
59	Kevin J. Nowka	[28]
60	J. A. Pascual-Gutiérrez	[17]
61	Ruchir Puri	[2] [3] [4] [11] [14]
62	Rahul M. Rao	[30] [32] [34] [36] [39] [48]
63	R. Rodríguez	[8] [9]
64	Kaushik Roy	[18] [19] [20] [22] [29] [31] [44]
65	Ghavam V. Shahidi	[5] [10]
66	Melanie Sherony	[10]
67	Wei-Chiang Shih	[49]
68	Leon J. Sigal	[1]
69	Rama N. Singh	[35] [42]
70	Amith Singhee	[42]
71	James H. Stathis	[8] [9] [36]
72	Pin Su	[38] [51]
73	Ming-Chien Tsai	[37] [43]
74	Ming-Hsien Tu	[37] [43] [50]
75	James D. Warnock	[1]
76	Richard Q. Williams	[23] [25]
77	S. C. Wilson	[5] [6]
78	H.-S. Philip Wong	[24]
79	Philip T. Wu	[1]
80	Ya-Ping Wu	[49]
81	Yu-Sheng Wu	[38]
82	Hao-I Yang	[40] [45] [46] [47] [49]
83	I. Yang	[10]
84	Shih-Chi Yang	[49]
85	Shyh-Chyi Yang	[46]
86	Sufi Zafar	[36]
87	N. Zamdmar	[17]

Colors in the list of coauthors

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