Chi-Nan Chuang

	2009
3		Chi-Nan Chuang, Shen-Iuan Liu: A 20-MHz to 3-GHz Wide-Range Multiphase Delay-Locked Loop. IEEE Trans. on Circuits and Systems 56-II(11): 850-854 (2009)
	2008
2		Chi-Nan Chuang, Shen-Iuan Liu: A 3-8 GHz Delay-Locked Loop With Cycle Jitter Calibration. IEEE Trans. on Circuits and Systems 55-II(11): 1094-1098 (2008)
	2006
1		Chi-Nan Chuang, Shen-Iuan Liu: A 1 V Phase Locked Loop with Leakage Compensation in 0.13 µm CMOS Technology. IEICE Transactions 89-C(3): 295-299 (2006)

Coauthor Index

1

Shen-Iuan Liu

[1] [2] [3]

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