 | 2012 |
|---|
| 6 |       | Lew Chua-Eoan,
Se-Hyun Yang:
Session 10 overview: High-performance digital: High performance digital subcommittee.
ISSCC 2012: 176-177 |
| 2011 |
|---|
| 5 | | Tobias Noll,
Raney Southerland,
Vladimir Stojanovic,
Sonia Leon,
Lew Chua-Eoan,
Alice Wang,
Byeong-Gyu Nam,
Masaya Sumita:
Design of "green" high-performance processor circuits.
ISSCC 2011: 518-519 |
| 2009 |
|---|
| 4 | | Amirali Shayan Arani,
Xiang Hu,
He Peng,
Wenjian Yu,
Wanping Zhang,
Chung-Kuan Cheng,
Mikhail Popovich,
Xiaoming Chen,
Lew Chua-Eoan,
Xiaohua Kong:
Parallel flow to analyze the impact of the voltage regulator model in nanoscale power distribution network.
ISQED 2009: 576-581 |
| 3 | | Wanping Zhang,
Wenjian Yu,
Xiang Hu,
Ling Zhang,
Rui Shi,
He Peng,
Zhi Zhu,
Lew Chua-Eoan,
Rajeev Murgai,
Toshiyuki Shibuya,
Noriyuki Ito,
Chung-Kuan Cheng:
Efficient Power Network Analysis Considering Multidomain Clock Gating.
IEEE Trans. on CAD of Integrated Circuits and Systems 28(9): 1348-1358 (2009) |
| 2008 |
|---|
| 2 | | Wanping Zhang,
Yi Zhu,
Wenjian Yu,
Ling Zhang,
Rui Shi,
He Peng,
Zhi Zhu,
Lew Chua-Eoan,
Rajeev Murgai,
Toshiyuki Shibuya,
Nuriyoki Ito,
Chung-Kuan Cheng:
Finding the Worst Voltage Violation in Multi-Domain Clock Gated Power Network.
DATE 2008: 537-540 |
| 2007 |
|---|
| 1 | | Wanping Zhang,
Ling Zhang,
Rui Shi,
He Peng,
Zhi Zhu,
Lew Chua-Eoan,
Rajeev Murgai,
Toshiyuki Shibuya,
Noriyuki Ito,
Chung-Kuan Cheng:
Fast power network analysis with multiple clock domains.
ICCD 2007: 456-463 |
Data released under the ODC-BY 1.0 license — See also our legal information page