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| 2012 | ||
|---|---|---|
| 2 | Valeriy Sukharev, Armen Kteyan, Jun-Ho Choy, Henrik Hovsepyan, Ara Markosian, Ehrenfried Zschech, Rene Huebner: Multi-scale Simulation Methodology for Stress Assessment in 3D IC: Effect of Die Stacking on Device Performance. J. Electronic Testing 28(1): 63-72 (2012) | |
| 2009 | ||
| 1 | Valeriy Sukharev, Ara Markosian, Armen Kteyan, Levon Manukyan, Nikolay Khachatryan, Jun-Ho Choy, Hasmik Lazaryan, Henrik Hovsepyan, Seiji Onoue, Takuo Kikuchi, Tetsuya Kamigaki: Control of design specific variation in etch-assisted via pattern transfer by means of full-chip simulation. ISQED 2009: 156-161 | |
| 1 | Henrik Hovsepyan | [1] [2] |
| 2 | Rene Huebner | [2] |
| 3 | Tetsuya Kamigaki | [1] |
| 4 | Nikolay Khachatryan | [1] |
| 5 | Takuo Kikuchi | [1] |
| 6 | Armen Kteyan | [1] [2] |
| 7 | Hasmik Lazaryan | [1] |
| 8 | Levon Manukyan | [1] |
| 9 | Ara Markosian | [1] [2] |
| 10 | Seiji Onoue | [1] |
| 11 | Valeriy Sukharev | [1] [2] |
| 12 | Ehrenfried Zschech | [2] |
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