 | 2011 |
| 17 |  | Andrew Zukoski,
Mihir R. Choudhury,
Kartik Mohanram:
Reliability-driven don't care assignment for logic synthesis.
DATE 2011: 1560-1565 |
| 2010 |
| 16 |  | Mihir R. Choudhury,
Masoud Rostami,
Kartik Mohanram:
Dominant critical gate identification for power and yield optimization in logic circuits.
ACM Great Lakes Symposium on VLSI 2010: 173-178 |
| 15 |  | Mihir R. Choudhury,
Vikas Chandra,
Kartik Mohanram,
Robert C. Aitken:
TIMBER: Time borrowing and error relaying for online timing error resilience.
DATE 2010: 1554-1559 |
| 14 |  | Mihir R. Choudhury,
Vikas Chandra,
Kartik Mohanram,
Robert C. Aitken:
Analytical model for TDDB-based performance degradation in combinational logic.
DATE 2010: 423-428 |
| 13 |  | Mihir R. Choudhury,
Kartik Mohanram:
Bi-decomposition of large Boolean functions using blocking edge graphs.
ICCAD 2010: 586-591 |
| 2009 |
| 12 |  | Mihir R. Choudhury,
Kartik Mohanram:
Timing-driven optimization using lookahead logic circuits.
DAC 2009: 390-395 |
| 11 |  | Mihir R. Choudhury,
Kartik Mohanram:
Masking timing errors on speed-paths in logic circuits.
DATE 2009: 87-92 |
| 10 |  | Mihir R. Choudhury,
Kartik Mohanram:
Reliability Analysis of Logic Circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems 28(3): 392-405 (2009) |
| 9 |  | Mihir R. Choudhury,
Quming Zhou,
Kartik Mohanram:
Soft Error Rate Reduction Using Circuit Optimization and Transient Filter Insertion.
J. Electronic Testing 25(2-3): 197-207 (2009) |
| 2008 |
| 8 |  | Mihir R. Choudhury,
Youngki Yoon,
Jing Guo,
Kartik Mohanram:
Technology exploration for graphene nanoribbon FETs.
DAC 2008: 272-277 |
| 7 |  | Mihir R. Choudhury,
Kartik Mohanram:
Approximate logic circuits for low overhead, non-intrusive concurrent error detection.
DATE 2008: 903-908 |
| 6 |  | Quming Zhou,
Mihir R. Choudhury,
Kartik Mohanram:
Tunable Transient Filters for Soft Error Rate Reduction in Combinational Circuits.
European Test Symposium 2008: 179-184 |
| 2007 |
| 5 |  | Mihir R. Choudhury,
Kyle Ringgenberg,
Scott Rixner,
Kartik Mohanram:
Interactive presentation: Single-ended coding techniques for off-chip interconnects to commodity memory.
DATE 2007: 1072-1077 |
| 4 |  | Mihir R. Choudhury,
Kartik Mohanram:
Accurate and scalable reliability analysis of logic circuits.
DATE 2007: 1454-1459 |
| 2006 |
| 3 |  | Mihir R. Choudhury,
Quming Zhou,
Kartik Mohanram:
Design optimization for single-event upset robustness using simultaneous dual-VDD and sizing techniques.
ICCAD 2006: 204-209 |
| 2 |  | Quming Zhou,
Mihir R. Choudhury,
Kartik Mohanram:
Design Optimization for Robustness to Single Event Upsets.
VTS 2006: 202-207 |
| 2005 |
| 1 |  | Saurabh Goyal,
Mihir R. Choudhury,
S. S. S. P. Rao,
L. Kalyan Kumar:
Multiple Fault Testing of Logic Resources of SRAM-Based FPGAs.
VLSI Design 2005: 742-747 |