Philip M. Chopp

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2011

4 Philip M. Chopp, Anas A. Hamoui: A 1V 13mW frequency-translating ΔΣ ADC with 55dB SNDR for a 4MHz band at 225MHz. CICC 2011: 1-4

2009

3 Philip M. Chopp, Anas A. Hamoui: Analysis of Clock-Jitter Effects in Continuous-Time Delta Sigma Modulators Using Discrete-Time Models. IEEE Trans. on Circuits and Systems 56-I(6): 1134-1145 (2009)

2 Philip M. Chopp, Anas A. Hamoui: Design Constraints for Image-Reject Frequency-Translating Delta Sigma Modulators. IEEE Trans. on Circuits and Systems 56-II(12): 896-900 (2009)

2007

1 Philip M. Chopp, Anas A. Hamoui: Discrete-Time Modeling of Clock Jitter in Continuous-Time Delta Sigma Modulators. ISCAS 2007: 497-500

	2011
4		Philip M. Chopp, Anas A. Hamoui: A 1V 13mW frequency-translating ΔΣ ADC with 55dB SNDR for a 4MHz band at 225MHz. CICC 2011: 1-4
	2009
3		Philip M. Chopp, Anas A. Hamoui: Analysis of Clock-Jitter Effects in Continuous-Time Delta Sigma Modulators Using Discrete-Time Models. IEEE Trans. on Circuits and Systems 56-I(6): 1134-1145 (2009)
2		Philip M. Chopp, Anas A. Hamoui: Design Constraints for Image-Reject Frequency-Translating Delta Sigma Modulators. IEEE Trans. on Circuits and Systems 56-II(12): 896-900 (2009)
	2007
1		Philip M. Chopp, Anas A. Hamoui: Discrete-Time Modeling of Clock Jitter in Continuous-Time Delta Sigma Modulators. ISCAS 2007: 497-500

Coauthor Index

1 Anas A. Hamoui [1] [2] [3] [4]

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