 | 2010 |
|---|
| 9 |       | Seung Hoon Choi,
Kunhyuk Kang,
Florentin Dartu,
Kaushik Roy:
Timed Input Pattern Generation for an Accurate Delay Calculation Under Multiple Input Switching.
IEEE Trans. on CAD of Integrated Circuits and Systems 29(3): 497-502 (2010) |
| 2004 |
|---|
| 8 | | Seung Hoon Choi,
Bipul Chandra Paul,
Kaushik Roy:
Novel sizing algorithm for yield improvement under process variation in nanometer technology.
DAC 2004: 454-459 |
| 7 | | Seung Hoon Choi:
Component Reconfiguration Tool for Software Product Lines with XML Technology.
WISE 2004: 572-583 |
| 2003 |
|---|
| 6 | | Seung Hoon Choi,
Kaushik Roy:
A New Crosstalk Noise Model for DOMINO Logic Circuits.
DATE 2003: 11112-11113 |
| 2002 |
|---|
| 5 | | Seung Hoon Choi,
Kaushik Roy,
Florentin Dartu:
Timed pattern generation for noise-on-delay calculation.
DAC 2002: 870-873 |
| 4 | | Seung Hoon Choi,
Kaushik Roy:
Noise Analysis under Capacitive and Inductive Coupling for High Speed Circuits.
DELTA 2002: 365-369 |
| 3 | | Seung Hoon Choi,
Bipul Chandra Paul,
Kaushik Roy:
Dynamic Noise Analysis with Capacitive and Inductive Coupling.
VLSI Design 2002: 65-70 |
| 2001 |
|---|
| 2 | | Bipul Chandra Paul,
Seung Hoon Choi,
Yonghee Im,
Kaushik Roy:
Design Verification and Robust Design Technique for Cross-Talk Faults.
Asian Test Symposium 2001: 449- |
| 2000 |
|---|
| 1 | | Dinesh Somasekhar,
Seung Hoon Choi,
Kaushik Roy,
Yibin Ye,
Vivek De:
Dynamic noise analysis in precharge-evaluate circuits.
DAC 2000: 243 |
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