Jung Hwan Choi

	2010
13		Jung Hwan Choi, Byung Guk Kim, Aurobindo Dasgupta, Kaushik Roy: Improved clock-gating control scheme for transparent pipeline. ASP-DAC 2010: 401-406
12		Jongsun Park, Jung Hwan Choi, Kaushik Roy: Dynamic Bit-Width Adaptation in DCT: An Approach to Trade Off Image Quality and Computation Energy. IEEE Trans. VLSI Syst. 18(5): 787-793 (2010)
	2009
11		Jung Hwan Choi, Nilanjan Banerjee, Kaushik Roy: Variation-Aware Low-Power Synthesis Methodology for Fixed-Point FIR Filters. IEEE Trans. on CAD of Integrated Circuits and Systems 28(1): 87-97 (2009)
10		Nilanjan Banerjee, Georgios Karakonstantis, Jung Hwan Choi, Chaitali Chakrabarti, Kaushik Roy: Design Methodology for Low Power and Parametric Robustness Through Output-Quality Modulation: Application to Color-Interpolation Filtering. IEEE Trans. on CAD of Integrated Circuits and Systems 28(8): 1127-1137 (2009)
	2008
9		Swaroop Ghosh, Jung Hwan Choi, Patrick Ndai, Kaushik Roy: O2C: occasional two-cycle operations for dynamic thermal management in high performance in-order microprocessors. ISLPED 2008: 189-192
8		Animesh Datta, Swarup Bhunia, Jung Hwan Choi, Saibal Mukhopadhyay, Kaushik Roy: Profit Aware Circuit Design Under Process Variations Considering Speed Binning. IEEE Trans. VLSI Syst. 16(7): 806-815 (2008)
	2007
7		Jung Hwan Choi, Jayathi Murthy, Kaushik Roy: The effect of process variation on device temperature in FinFET circuits. ICCAD 2007: 747-751
6		Nilanjan Banerjee, Jung Hwan Choi, Kaushik Roy: A process variation aware low power synthesis methodology for fixed-point FIR filters. ISLPED 2007: 147-152
5		Jung Hwan Choi, Aditya Bansal, Mesut Meterelliyoz, Jayathi Murthy, Kaushik Roy: Self-Consistent Approach to Leakage Power and Temperature Estimation to Predict Thermal Runaway in FinFET Circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 26(11): 2059-2068 (2007)
	2006
4		Aditya Bansal, Mesut Meterelliyoz, Siddharth Singh, Jung Hwan Choi, Jayathi Murthy, Kaushik Roy: Compact thermal models for estimation of temperature-dependent power/performance in FinFET technology. ASP-DAC 2006: 237-242
3		Animesh Datta, Swarup Bhunia, Jung Hwan Choi, Saibal Mukhopadhyay, Kaushik Roy: Speed binning aware design methodology to improve profit under parameter variations. ASP-DAC 2006: 712-717
2		Jongsun Park, Jung Hwan Choi, Kaushik Roy: Dynamic bit-width adaptation in DCT: image quality versus computation energy trade-off. DATE 2006: 520-521
1		Jung Hwan Choi, Aditya Bansal, Mesut Meterelliyoz, Jayathi Murthy, Kaushik Roy: Leakage power dependent temperature estimation to predict thermal runaway in FinFET circuits. ICCAD 2006: 583-586

Coauthor Index

1	Nilanjan Banerjee	[6] [10] [11]
2	Aditya Bansal	[1] [4] [5]
3	Swarup Bhunia	[3] [8]
4	Chaitali Chakrabarti	[10]
5	Aurobindo Dasgupta	[13]
6	Animesh Datta	[3] [8]
7	Swaroop Ghosh	[9]
8	Georgios Karakonstantis	[10]
9	Byung Guk Kim	[13]
10	Mesut Meterelliyoz	[1] [4] [5]
11	Saibal Mukhopadhyay	[3] [8]
12	Jayathi Murthy	[1] [4] [5] [7]
13	Patrick Ndai	[9]
14	Jongsun Park	[2] [12]
15	Kaushik Roy	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13]
16	Siddharth Singh	[4]

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