Hae-Wook Choi

	2010
14		Hun-sik Kang, Min-Lee Hwang, Jin Lee, Sok-Kyu Lee, Hae-Wook Choi, Sin-Chong Park: A Calibration Scheme for Delay Mismatch Compensation in OFDM-Based Polar Transmitter. IEICE Transactions 93-B(10): 2791-2794 (2010)
	2007
13		Seongmin Noh, Daehyun Kim, Vu-Duc Ngo, Hae-Wook Choi: Performance and Complexity Analysis of Credit-Based End-to-End Flow Control in Network-on-Chip. ISPA 2007: 268-277
12		Huy Nam Nguyen, Vu-Duc Ngo, Younghwan Bae, Hanjin Cho, Hae-Wook Choi: An QoS Aware Mapping of Cores Onto NoC Architectures. ISPA 2007: 278-288
11		Vu-Duc Ngo, June-Young Chang, Younghwan Bae, Hanjin Cho, Hae-Wook Choi: Latency Optimization for NoC Design of H.264 Decoder Based on Self-similar Traffic Modeling. ISPA 2007: 289-302
	2006
10		Vu-Duc Ngo, Huy Nam Nguyen, Hae-Wook Choi: The Optimum Network on Chip Architectures for Video Object Plane Decoder Design. ISPA 2006: 75-85
9		Vu-Duc Ngo, Huy Nam Nguyen, Younghwan Bae, Hanjin Cho, Hae-Wook Choi: Throughput Aware Mapping for Network on Chip Design of H.264 Decoder. ISPA Workshops 2006: 791-802
8		Sang-Ho Seo, Hae-Wook Choi, Sin-Chong Park: Low Latency and Memory Efficient Viterbi Decoder Using Modified State-Mapping Method. IEICE Transactions 89-B(4): 1413-1416 (2006)
7		Ho-Seok Choi, Hae-Wook Choi, Sin-Chong Park: Instruction Based Synthesizable Testbench Architecture. IEICE Transactions 89-C(5): 653-657 (2006)
6		Jungbo Son, Hae-Wook Choi, Sin-Chong Park: Accelerating Verification with Reusable Testbench. IEICE Transactions 89-D(2): 853-856 (2006)
	2005
5		Huy Nam Nguyen, Vu-Duc Ngo, Hae-Wook Choi: Realization of video object plane decoder on mesh on-chip network architecture. Circuits, Signals, and Systems 2005: 137-141
4		Vu-Duc Ngo, Huy Nam Nguyen, Hae-Wook Choi: Analyzing the Performance of Mesh and Fat-Tree Topologies for Network on Chip Design. EUC 2005: 300-310
3		Huy Nam Nguyen, Vu-Duc Ngo, Hae-Wook Choi: Realization of Video Object Plane Decoder on On-Chip Network Architecture. ICESS 2005: 256-264
2		Vu-Duc Ngo, Huy Nam Nguyen, Hae-Wook Choi: Designing On-Chip Network Based on Optimal Latency Criteria. ICESS 2005: 287-298
	2004
1		Vu-Duc Ngo, Hae-Wook Choi, Sin-Chong Park: Expurgated sphere bound for LDPC. PIMRC 2004: 2591-2595

Coauthor Index

1	Younghwan Bae	[9] [11] [12]
2	June-Young Chang	[11]
3	Hanjin Cho	[9] [11] [12]
4	Ho-Seok Choi	[7]
5	Min-Lee Hwang	[14]
6	Hun-sik Kang	[14]
7	Daehyun Kim (Dae Hyun Kim)	[13]
8	Jin Lee	[14]
9	Sok-Kyu Lee	[14]
10	Vu-Duc Ngo	[1] [2] [3] [4] [5] [9] [10] [11] [12] [13]
11	Huy Nam Nguyen	[2] [3] [4] [5] [9] [10] [12]
12	Seongmin Noh	[13]
13	Sin-Chong Park	[1] [6] [7] [8] [14]
14	Sang-Ho Seo	[8]
15	Jungbo Son	[6]

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