Kyoung Youn Cho

	2011
4		Kyoung Youn Cho, Rajagopalan Srinivasan: A scan cell architecture for inter-clock at-speed delay testing. VTS 2011: 213-218
	2007
3		Kyoung Youn Cho, Subhasish Mitra, Edward J. McCluskey: California scan architecture for high quality and low power testing. ITC 2007: 1-10
2		Kyoung Youn Cho, Edward J. McCluskey: Test Set Reordering Using the Gate Exhaustive Test Metric. VTS 2007: 199-204
	2005
1		Kyoung Youn Cho, Subhasish Mitra, Edward J. McCluskey: Gate exhaustive testing. ITC 2005: 7

Coauthor Index

1	Edward J. McCluskey	[1] [2] [3]
2	Subhasish Mitra	[1] [3]
3	Rajagopalan Srinivasan	[4]

Colors in the list of coauthors

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