 | 2011 |
|---|
| 5 |       | Soojin Kim,
Kyeongsoon Cho:
Design of high-speed clock recovery circuit for burst-mode applications.
ISCAS 2011: 177-180 |
| 2009 |
|---|
| 4 | | Hoyoung Chang,
Soojin Kim,
Seonyoung Lee,
Kyeongsoon Cho:
High-performance architecture of H.264 integer-pixel motion estimation IP for real-time 1080HD video CODEC.
SoCC 2009: 419-422 |
| 2007 |
|---|
| 3 | | Seonyoung Lee,
Kyeongsoon Cho:
Design of Transform and Quantization Circuit for Multi-Standard Integrated Video Decoder.
SiPS 2007: 181-186 |
| 2006 |
|---|
| 2 | | Seonyoung Lee,
Kyeongsoon Cho:
Implementation of an AMBA-Compliant IP for H.264 Transform and Quantization.
APCCAS 2006: 1071-1074 |
| 1 | | Seonyoung Lee,
Kyeongsoon Cho:
An Efficient Architecture of High-Performance Deblocking Filter for H.264/AVC.
IEICE Transactions 89-A(6): 1736-1739 (2006) |
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