 | 2012 |
| 16 |  | Sebastian Hoyos,
Cheongyuen W. Tsang,
Johan Vanderhaegen,
Yun Chiu,
Yasutoshi Aibara,
Haideh Khorramabadi,
Borivoje Nikolic:
A 15 MHz to 600 MHz, 20 mW, 0.38 mm2 Split-Control, Fast Coarse Locking Digital DLL in 0.13 µ m CMOS.
IEEE Trans. VLSI Syst. 20(3): 564-568 (2012) |
| 2011 |
| 15 |  | Yun Chiu:
Equalization techniques for nonlinear analog circuits.
IEEE Communications Magazine 49(4): 132-139 (2011) |
| 14 |  | Seung-Chul Lee,
Yun Chiu:
Digital Calibration of Capacitor Mismatch in Sigma-Delta Modulators.
IEEE Trans. on Circuits and Systems 58-I(4): 690-698 (2011) |
| 13 |  | Wenbo Liu,
Pingli Huang,
Yun Chiu:
A 12-bit, 45-MS/s, 3-mW Redundant Successive-Approximation-Register Analog-to-Digital Converter With Digital Calibration.
J. Solid-State Circuits 46(11): 2661-2672 (2011) |
| 12 |  | Pingli Huang,
Szukang Hsien,
Victor Lu,
Peiyuan Wan,
Seung-Chul Lee,
Wenbo Liu,
Bo-Wei Chen,
Yung-Pin Lee,
Wen-Tsao Chen,
Tzu-Yi Yang,
Gin-Kou Ma,
Yun Chiu:
SHA-Less Pipelined ADC With In Situ Background Clock-Skew Calibration.
J. Solid-State Circuits 46(8): 1893-1903 (2011) |
| 2010 |
| 11 |  | Peiyuan Wan,
Yun Chiu,
Pingfen Lin:
A 5.8-mW, 20-MHz, 4th-order programmable elliptic filter achieving over -80-dB IM3.
CICC 2010: 1-4 |
| 10 |  | Pingli Huang,
Szukang Hsien,
Victor Lu,
Peiyuan Wan,
Seung-Chul Lee,
Wenbo Liu,
Bo-Wei Chen,
Yung-Pin Lee,
Wen-Tsao Chen,
Tzu-Yi Yang,
Gin-Kou Ma,
Yun Chiu:
SHA-less pipelined ADC converting 10th Nyquist band with in-situ clock-skew calibration.
CICC 2010: 1-4 |
| 9 |  | Wenbo Liu,
Pingli Huang,
Yun Chiu:
A 12b 22.5/45MS/s 3.0mW 0.059mm2 CMOS SAR ADC achieving over 90dB SFDR.
ISSCC 2010: 380-381 |
| 8 |  | Seung-Chul Lee,
Yun Chiu:
Digital Calibration of Nonlinear Memory Errors in Sigma-Delta Modulators.
IEEE Trans. on Circuits and Systems 57-I(9): 2462-2475 (2010) |
| 7 |  | Bei Peng,
Hao Li,
Seung-Chul Lee,
Pingfen Lin,
Yun Chiu:
A Virtual-ADC Digital Background Calibration Technique for Multistage A/D Conversion.
IEEE Trans. on Circuits and Systems 57-II(11): 853-857 (2010) |
| 6 |  | Bei Peng,
Hao Li,
Pingfen Lin,
Yun Chiu:
An Offset Double Conversion Technique for Digital Calibration of Pipelined ADCs.
IEEE Trans. on Circuits and Systems 57-II(12): 961-965 (2010) |
| 5 |  | Dae Hyun Kwon,
Hao Li,
Yuchun Chang,
Richard Tseng,
Yun Chiu:
Digitally Equalized CMOS Transmitter Front-End With Integrated Power Amplifier.
J. Solid-State Circuits 45(8): 1602-1614 (2010) |
| 2009 |
| 4 |  | Dae Hyun Kwon,
Hao Li,
Yuchun Chang,
Richard Tseng,
Yun Chiu:
CMOS RF transmitter with integrated power amplifier utilizing digital equalization.
CICC 2009: 403-406 |
| 3 |  | Wenbo Liu,
Yuchun Chang,
Szukang Hsien,
Bo-Wei Chen,
Yung-Pin Lee,
Wen-Tsao Chen,
Tzu-Yi Yang,
Gin-Kou Ma,
Yun Chiu:
A 600MS/s 30mW 0.13µm CMOS ADC array achieving over 60dB SFDR with adaptive digital equalization.
ISSCC 2009: 82-83 |
| 2008 |
| 2 |  | Richard Tseng,
Ada S. Y. Poon,
Yun Chiu:
A Mixed-Signal Vector Modulator for Eigenbeamforming Receivers.
IEEE Trans. on Circuits and Systems 55-II(5): 479-483 (2008) |
| 2007 |
| 1 |  | Pingli Huang,
Yun Chiu:
A Gradient-Based Algorithm for Sampling Clock Skew Calibration of SHA-less Pipeline ADCs.
ISCAS 2007: 1241-1244 |