 | 2010 |
|---|
| 4 |       | De-Shiuan Chiou,
Yu-Ting Chen,
Da-Cheng Juan,
Shih-Chieh Chang:
Sleep Transistor Sizing for Leakage Power Minimization Considering Temporal Correlation.
IEEE Trans. on CAD of Integrated Circuits and Systems 29(8): 1285-1289 (2010) |
| 2009 |
|---|
| 3 | | De-Shiuan Chiou,
Shih-Hsin Chen,
Shih-Chieh Chang:
Sleep Transistor Sizing for Leakage Power Minimization Considering Charge Balancing.
IEEE Trans. VLSI Syst. 17(9): 1330-1334 (2009) |
| 2007 |
|---|
| 2 | | De-Shiuan Chiou,
Da-Cheng Juan,
Yu-Ting Chen,
Shih-Chieh Chang:
Fine-Grained Sleep Transistor Sizing Algorithm for Leakage Power Minimization.
DAC 2007: 81-86 |
| 2006 |
|---|
| 1 | | De-Shiuan Chiou,
Shih-Hsin Chen,
Shih-Chieh Chang,
Chingwei Yeh:
Timing driven power gating.
DAC 2006: 121-124 |
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