Marko P. Chew

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1999

2 Marko P. Chew, Sharad Saxena, Thomas F. Cobourn, Purnendu K. Mozumder, Andrzej J. Strojwas: A New Methodology for Concurrent Technology Development and Cell Library Optimization. VLSI Design 1999: 18-25

1991

1 Marko P. Chew, Andrzej J. Strojwas: Utilizing Logic Information in Multi-Level Timing Simulation. DAC 1991: 215-218

	1999
2		Marko P. Chew, Sharad Saxena, Thomas F. Cobourn, Purnendu K. Mozumder, Andrzej J. Strojwas: A New Methodology for Concurrent Technology Development and Cell Library Optimization. VLSI Design 1999: 18-25
	1991
1		Marko P. Chew, Andrzej J. Strojwas: Utilizing Logic Information in Multi-Level Timing Simulation. DAC 1991: 215-218

Coauthor Index

Last update Tue May 29 01:28:40 2012 CET by the DBLP Team —

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1	Thomas F. Cobourn	[2]
2	Purnendu K. Mozumder	[2]
3	Sharad Saxena	[2]
4	Andrzej J. Strojwas (Andreas J. Strojwas)	[1] [2]