B. Chetwynd

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2001

2 Adam J. Elbirt, W. Yip, B. Chetwynd, Christof Paar: An FPGA-based performance evaluation of the AES block cipher candidate algorithm finalists. IEEE Trans. VLSI Syst. 9(4): 545-557 (2001)

2000

1 Adam J. Elbirt, W. Yip, B. Chetwynd, Christof Paar: An FPGA Implementation and Performance Evaluation of the AES Block Cipher Candidate Algorithm Finalists. AES Candidate Conference 2000: 13-27

	2001
2		Adam J. Elbirt, W. Yip, B. Chetwynd, Christof Paar: An FPGA-based performance evaluation of the AES block cipher candidate algorithm finalists. IEEE Trans. VLSI Syst. 9(4): 545-557 (2001)
	2000
1		Adam J. Elbirt, W. Yip, B. Chetwynd, Christof Paar: An FPGA Implementation and Performance Evaluation of the AES Block Cipher Candidate Algorithm Finalists. AES Candidate Conference 2000: 13-27

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