Yibo Chen

	2012
19		Yibo Chen, Guangyu Sun, Qiaosha Zou, Yuan Xie: 3DHLS: Incorporating high-level synthesis in physical planning of three-dimensional (3D) ICs. DATE 2012: 1185-1190
	2011
18		Qiaosha Zou, Yibo Chen, Yuan Xie, Alan Su: System-level design space exploration for three-dimensional (3D) SoCs. CODES+ISSS 2011: 385-388
17		Yibo Chen, Eren Kursun, Dave Motschman, Charles Johnson, Yuan Xie: Analysis and mitigation of lateral thermal blockage effect of through-silicon-via in 3D IC designs. ISLPED 2011: 397-402
16		Guangyu Sun, Yibo Chen, Xiangyu Dong, Jin Ouyang, Yuan Xie: Three-dimensional Integrated Circuits: Design, EDA, and Architecture. Foundations and Trends in Electronic Design Automation 5(1-2): 1-151 (2011)
15		Feng Wang, Yibo Chen, Chrysostomos Nicopoulos, Xiaoxia Wu, Yuan Xie, Narayanan Vijaykrishnan: Variation-Aware Task and Communication Mapping for MPSoC Architecture. IEEE Trans. on CAD of Integrated Circuits and Systems 30(2): 295-307 (2011)
14		Yibo Chen, Chanle Wu, Ming Xie, Xiaojun Guo: Solving the Sparsity Problem in Recommender Systems Using Association Retrieval. JCP 6(9): 1896-1902 (2011)
	2010
13		Dimin Niu, Yibo Chen, Xiangyu Dong, Yuan Xie: Energy and performance driven circuit design for emerging phase-change memory. ASP-DAC 2010: 193-198
12		Yibo Chen, Yuan Xie, Yu Wang, Andrés Takach: Minimizing leakage power in aging-bounded high-level synthesis with design time multi-Vth assignment. ASP-DAC 2010: 689-694
11		Yibo Chen, Yuan Xie, Yu Wang, Andrés Takach: Parametric yield driven resource binding in behavioral synthesis with multi-Vth/Vdd library. ASP-DAC 2010: 781-786
10		Guangyu Sun, Yongsoo Joo, Yibo Chen, Dimin Niu, Yuan Xie, Yiran Chen, Hai Li: A Hybrid solid-state storage architecture for the performance, energy consumption, and lifetime improvement. HPCA 2010: 1-12
9		Yibo Chen, Dimin Niu, Yuan Xie, Krishnendu Chakrabarty: Cost-effective integration of three-dimensional (3D) ICs emphasizing testing cost analysis. ICCAD 2010: 471-476
8		Yibo Chen, Jishen Zhao, Yuan Xie: 3D-nonFAR: three-dimensional non-volatile FPGA architecture using phase change memory. ISLPED 2010: 55-60
7		Xiaoxia Wu, Yibo Chen, Krishnendu Chakrabarty, Yuan Xie: Test-access mechanism optimization for core-based three-dimensional SOCs. Microelectronics Journal 41(10): 601-615 (2010)
	2009
6		Jin Ouyang, Guangyu Sun, Yibo Chen, Lian Duan, Tao Zhang, Yuan Xie, Mary Jane Irwin: Arithmetic unit design using 180nm TSV-based 3D stacking technology. 3DIC 2009: 1-4
5		Yibo Chen, Yuan Xie: Tolerating process variations in high-level synthesis using transparent latches. ASP-DAC 2009: 73-78
4		Yuan Xie, Yibo Chen: Statistical High-Level Synthesis under Process Variability. IEEE Design & Test of Computers 26(4): 78-87 (2009)
	2008
3		Xiaoxia Wu, Yibo Chen, Krishnendu Chakrabarty, Yuan Xie: Test-access mechanism optimization for core-based three-dimensional SOCs. ICCD 2008: 212-218
2		Xiaoxia Wu, Yibo Chen, Krishnendu Chakrabarty, Yuan Xie: Test-Access Solutions for Three-Dimensional SOCs. ITC 2008: 1
1		Yibo Chen, Jin Ouyang, Yuan Xie: ILP-based scheme for timing variation-aware scheduling and resource binding. SoCC 2008: 27-30

Coauthor Index

1	Krishnendu Chakrabarty	[2] [3] [7] [9]
2	Yiran Chen	[10]
3	Xiangyu Dong	[13] [16]
4	Lian Duan	[6]
5	Xiaojun Guo	[14]
6	Mary Jane Irwin	[6]
7	Charles Johnson	[17]
8	Yongsoo Joo	[10]
9	Eren Kursun	[17]
10	Hai Li	[10]
11	Dave Motschman	[17]
12	Chrysostomos Nicopoulos	[15]
13	Dimin Niu	[9] [10] [13]
14	Jin Ouyang	[1] [6] [16]
15	Alan Su	[18]
16	Guangyu Sun	[6] [10] [16] [19]
17	Andrés Takach	[11] [12]
18	Narayanan Vijaykrishnan (Vijaykrishnan Narayanan)	[15]
19	Yu Wang	[11] [12]
20	Feng Wang	[15]
21	Chanle Wu	[14]
22	Xiaoxia Wu	[2] [3] [7] [15]
23	Ming Xie	[14]
24	Yuan Xie	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [15] [16] [17] [18] [19]
25	Tao Zhang	[6]
26	Jishen Zhao	[8]
27	Qiaosha Zou	[18] [19]

Colors in the list of coauthors

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