 | 2011 |
|---|
| 10 |       | Hong-Yuan Jheng,
Yen-Hsiang Chen,
Shanq-Jang Ruan,
Ziming Qi:
FPGA implementation of high sampling rate in-car non-stationary noise cancellation based on adaptive Wiener filter.
VLSI-SoC 2011: 114-117 |
| 2010 |
|---|
| 9 | | Yu-Ting Pai,
Li-Te Lee,
Shanq-Jang Ruan,
Yen-Hsiang Chen,
Saraju P. Mohanty,
Elias Kougianos:
Honeycomb model based skin colour detector for face detection.
IJCAT 39(1/2/3): 93-100 (2010) |
| 2008 |
|---|
| 8 | | Yen-Hsiang Chen,
Shu-Song Chen,
Shanq-Jang Ruan:
Integrating Bi-Direction Audio and Video Transmission for UltraVNC.
NCM (2) 2008: 505-508 |
| 2006 |
|---|
| 7 | | Jin-Tai Yan,
Yen-Hsiang Chen,
Chia-Fang Lee,
Ming-Ching Huang:
Multilevel timing-constrained full-chip routing in hierarchical quad-grid model.
ISCAS 2006 |
| 6 | | Jin-Tai Yan,
Kuen-Ming Lin,
Yen-Hsiang Chen:
Optimal shielding insertion for inductive noise avoidance.
ISCAS 2006 |
| 5 | | Jin-Tai Yan,
Chia-Fang Lee,
Yen-Hsiang Chen:
Dynamic Tree Reconstruction with Application to Timing-Constrained Congestion-Driven Global Routing.
VLSI Design 2006: 147-152 |
| 2005 |
|---|
| 4 | | Jin-Tai Yan,
Yen-Hsiang Chen,
Chia-Wei Wu:
Probabilistic congestion prediction in hierarchical quad-grid model.
ISCAS (2) 2005: 1350-1353 |
| 3 | | Jin-Tai Yan,
Chia-Wei Wu,
Yen-Hsiang Chen:
Wiring area optimization in floorplan-aware hierarchical power grids.
ISCAS (2) 2005: 1366-1369 |
| 2 | | Jin-Tai Yan,
Kai-Ping Lin,
Yen-Hsiang Chen:
Decoupling capacitance allocation in noise-aware floorplanning based on DBL representation.
ISCAS (3) 2005: 2219-2222 |
| 1 | | Jin-Tai Yan,
Yen-Hsiang Chen,
Chia-Fang Lee:
Timing-Constrained Flexibility-Driven Routing Tree Construction.
IEICE Transactions 88-D(7): 1360-1368 (2005) |
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