 | 2008 |
| 10 |  | Tsau-Shuan Wu,
Alkan Cengiz,
Tom W. Chen:
Improving SER Immunity of Combinational Logic Using Combinations of Spatial and Temporal Checking.
DSD 2008: 535-541 |
| 2007 |
| 9 |  | Justin Gregg,
Tom W. Chen:
Post Silicon Power/Performance Optimization in the Presence of Process Variations Using Individual Well-Adaptive Body Biasing.
IEEE Trans. VLSI Syst. 15(3): 366-376 (2007) |
| 2006 |
| 8 |  | Alkan Cengiz,
Tom W. Chen:
Routing-Tree Construction with Concurrent Performance, Power and Congestion Optimization.
ISVLSI 2006: 367-372 |
| 7 |  | Alkan Cengiz,
Tom W. Chen:
A Progressive Two-Stage Global Routing for Macro-Cell Based Designs.
VLSI Design 2006: 777-780 |
| 2005 |
| 6 |  | Justin Gregg,
Tom W. Chen:
Optimization of Individual Well Adaptive Body Biasing (IWABB) Using a Multiple Objective Evolutionary Algorithm.
ISQED 2005: 297-302 |
| 5 |  | Justin Gregg,
Tom W. Chen:
PEER: Enriching Secondary Engineering Education Through a College Summer Camp.
MSE 2005: 109-110 |
| 2004 |
| 4 |  | Tom W. Chen,
Justin Gregg:
A Low Cost Individual-Well Adaptive Body Bias (IWABB) Scheme for Leakage Power Reduction and Performance Enhancement in the Presence of Intra-Die Variations.
DATE 2004: 240-245 |
| 3 |  | Justin Gregg,
Tom W. Chen:
Post Silicon Power/Performance Optimization in the Presence of ProcessVariations Using Individual Well Adaptive Body Biasing (IWABB).
ISQED 2004: 453-458 |
| 2000 |
| 2 |  | Tom W. Chen,
Alkan Cengiz:
Measuring routing congestion for multi-layer global routing.
ACM Great Lakes Symposium on VLSI 2000: 59-62 |
| 1999 |
| 1 |  | Ytong-Bin Kim,
Tom W. Chen:
Assessing merged DRAM/Logic technology.
Integration 27(2): 179-194 (1999) |