Shyh-Jong Chen

	1999
1		Shanq-Jang Ruan, Rung-Ji Shang, Feipei Lai, Shyh-Jong Chen, Xian-Jun Huang: A bipartition-codec architecture to reduce power in pipelined circuits. ICCAD 1999: 84-90

Coauthor Index

1	Xian-Jun Huang	[1]
2	Feipei Lai	[1]
3	Shanq-Jang Ruan	[1]
4	Rung-Ji Shang	[1]

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