 | 2012 |
| 9 |  | Cheng-Ta Ko,
Kuan-Neng Chen:
Low temperature bonding technology for 3D integration.
Microelectronics Reliability 52(2): 302-311 (2012) |
| 8 |  | Ya-Sheng Tang,
Yao-Jen Chang,
Kuan-Neng Chen:
Wafer-level Cu-Cu bonding technology.
Microelectronics Reliability 52(2): 312-320 (2012) |
| 7 |  | S. L. Lin,
W. C. Huang,
C. T. Ko,
Kuan-Neng Chen:
BCB-to-oxide bonding technology for 3D integration.
Microelectronics Reliability 52(2): 352-355 (2012) |
| 2011 |
| 6 |  | Kuan-Neng Chen,
Chuan Seng Tan:
Integration schemes and enabling technologies for three-dimensional integrated circuits.
IET Computers & Digital Techniques 5(3): 160-168 (2011) |
| 2010 |
| 5 |  | Cheng-Ta Ko,
Kuan-Neng Chen,
Wei-Chung Lo,
Chuan-An Cheng,
Wen-Chun Huang,
Zhi-Cheng Hsiao,
Huan-Chun Fu,
Yu-Hua Chen:
Wafer-level 3D integration using hybrid bonding.
3DIC 2010: 1-4 |
| 4 |  | Cheng-Ta Ko,
Kuan-Neng Chen:
Wafer-level bonding/stacking technology for 3D integration.
Microelectronics Reliability 50(4): 481-488 (2010) |
| 2008 |
| 3 |  | Steven J. Koester,
Albert M. Young,
Roy R. Yu,
Sampath Purushothaman,
Kuan-Neng Chen,
Douglas C. La Tulipe Jr.,
Narender Rana,
Leathen Shi,
Matthew R. Wordeman,
Edmund J. Sprogis:
Wafer-level 3D integration technology.
IBM Journal of Research and Development 52(6): 583-597 (2008) |
| 2004 |
| 2 |  | Shamik Das,
Andy Fan,
Kuan-Neng Chen,
Chuan Seng Tan,
Nisha Checka,
Rafael Reif:
Technology, performance, and computer-aided design of three-dimensional integrated circuits.
ISPD 2004: 108-115 |
| 2002 |
| 1 |  | Rafael Reif,
Andy Fan,
Kuan-Neng Chen,
Shamik Das:
Fabrication Technologies for Three-Dimensional Integrated Circuits (invited).
ISQED 2002: 33-37 |