 | 2011 |
|---|
| 8 |       | Chien-Chih Huang,
Jwu-E Chen,
Pei-Wen Luo,
Chin-Long Wey:
Yield-award placement optimization for Switched-Capacitor analog integrated circuits.
SoCC 2011: 170-173 |
| 7 | | Pei-Wen Luo,
Jwu-E Chen,
Chin-Long Wey:
Design Methodology for Yield Enhancement of Switched-Capacitor Analog Integrated Circuits.
IEICE Transactions 94-A(1): 352-361 (2011) |
| 2009 |
|---|
| 6 | | Jwu-E Chen,
Lu-Tsou Yeh,
Hua-Hsiang Tseng,
G. W. Wu,
In-Hang Chung:
Development of an Emotional Robot as a Teaching Assistant.
Edutainment 2009: 518-523 |
| 5 | | Jwu-E Chen,
Pei-Wen Luo,
Chin-Long Wey:
Yield evaluation of analog placement with arbitrary capacitor ratio.
ISQED 2009: 179-184 |
| 4 | | Kuen-Long Leu,
Chin-Long Wey,
Jwu-E Chen,
Yung-Yuan Chen:
Robustness investigation of the FlexRay system.
SIES 2009: 148-151 |
| 2008 |
|---|
| 3 | | Pei-Wen Luo,
Jwu-E Chen,
Chin-Long Wey,
Liang-Chia Cheng,
Ji-Jan Chen,
Wen Ching Wu:
Impact of Capacitance Correlation on Yield Enhancement of Mixed-Signal/Analog Integrated Circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems 27(11): 2097-2101 (2008) |
| 2002 |
|---|
| 2 | | Chih-Wen Lu,
Chung-Len Lee,
Chauchin Su,
Jwu-E Chen:
Analysis of Application of the IDDQ Technique to the Deep Sub-Micron VLSI Testing.
J. Electronic Testing 18(1): 89-97 (2002) |
| 1995 |
|---|
| 1 | | Yung-Yuan Chen,
Ching-Hwa Cheng,
Jwu-E Chen:
An efficient switching network fault diagnosis for reconfigurable VLSI/WSI array processors.
VLSI Design 1995: 349-354 |
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