Jun-Hong Chen

	2010
15		Jun-Hong Chen, Ming-Der Shieh, Wen-Ching Lin: A High-Performance Unified-Field Reconfigurable Cryptographic Processor. IEEE Trans. VLSI Syst. 18(8): 1145-1158 (2010)
	2009
14		Ming-Der Shieh, Jun-Hong Chen, Wen-Ching Lin, Hao-Hsuan Wu: A New Algorithm for High-Speed Modular Multiplication Design. IEEE Trans. on Circuits and Systems 56-I(9): 2009-2019 (2009)
13		Ming-Der Shieh, Jun-Hong Chen, Wen-Ching Lin, Chien-Ming Wu: An Efficient Multiplier/Divider Design for Elliptic Curve Cryptosystem over GF(2m). J. Inf. Sci. Eng. 25(5): 1555-1573 (2009)
	2008
12		Jun-Hong Chen, Sue-Jing Huang, Wen-Ching Lin, Yung-Kuei Lu, Ming-Der Shieh: Exploration of Low-Cost Configurable S-Box Designs for AES Applications. ICESS 2008: 422-428
11		Wen-Ching Lin, Jun-Hong Chen, Ming-Der Shieh: A new look-up table-based multiplier/squarer design for cryptosystems over GF(2m). ISCAS 2008: 464-467
10		Jun-Hong Chen, Wen-Ching Lin, Hao-Hsuan Wu, Ming-Der Shieh: High-speed modular multiplication design for public-key cryptosystems. ISCAS 2008: 680-683
9		Ming-Der Shieh, Jun-Hong Chen, Hao-Hsuan Wu, Wen-Ching Lin: A New Modular Exponentiation Architecture for Efficient Design of RSA Cryptosystem. IEEE Trans. VLSI Syst. 16(9): 1151-1161 (2008)
	2007
8		Jun-Hong Chen, Haw-Shiuan Wu, Ming-Der Shieh, Wen-Ching Lin: A New Montgomery Modular Multiplication Algorithm and its VLSI Design for RSA Cryptosystem. ISCAS 2007: 3780-3783
	2006
7		Jun-Hong Chen, Ming-Der Shieh, Haw-Shiuan Wu, Wen-Ching Lin: Asynchronous Design of Modular Multiplication Using Adaptive Radix Computation. APCCAS 2006: 606-609
6		Ming-Der Shieh, Yung-Kuei Lu, Shen-Ming Chung, Jun-Hong Chen: Design and implementation of efficient Reed-Solomon decoders for multi-mode applications. ISCAS 2006
5		Jing-Shiun Lin, Chung-Kung Lee, Ming-Der Shieh, Jun-Hong Chen: High-speed CRC design for 10 Gbps applications. ISCAS 2006
4		Ming-Der Shieh, Jun-Hong Chen, Chien-Ming Wu: High-Speed Design of Montgomery Inverse Algorithm over GF(2m). IEICE Transactions 89-A(2): 559-565 (2006)
	2005
3		Jun-Hong Chen, Ming-Der Shieh, Chien-Ming Wu: Concurrent algorithm for high-speed point multiplication in elliptic curve cryptography. ISCAS (5) 2005: 5254-5257
2		Chien-Ming Wu, Ming-Der Shieh, Chien-Hsing Wu, Yin-Tsung Hwang, Jun-Hong Chen: VLSI architectural design tradeoffs for sliding-window log-MAP decoders. IEEE Trans. VLSI Syst. 13(4): 439-447 (2005)
	2004
1		Chien-Ming Wu, Ming-Der Shieh, Chien-Hsing Wu, Yin-Tsung Hwang, Jun-Hong Chen, Hsin-Fu Lo: VLSI architecture exploration for sliding-window Log-MAP decoders. ISCAS (2) 2004: 513-516

Coauthor Index

1	Shen-Ming Chung	[6]
2	Sue-Jing Huang	[12]
3	Yin-Tsung Hwang	[1] [2]
4	Chung-Kung Lee	[5]
5	Jing-Shiun Lin	[5]
6	Wen-Ching Lin	[7] [8] [9] [10] [11] [12] [13] [14] [15]
7	Hsin-Fu Lo	[1]
8	Yung-Kuei Lu	[6] [12]
9	Ming-Der Shieh	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15]
10	Chien-Hsing Wu	[1] [2]
11	Chien-Ming Wu	[1] [2] [3] [4] [13]
12	Hao-Hsuan Wu	[9] [10] [14]
13	Haw-Shiuan Wu	[7] [8]

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