 | 2010 |
|---|
| 8 |       | Huang-Yu Chen,
Szu-Jui Chou,
Yao-Wen Chang:
Density gradient minimization with coupling-constrained dummy fill for CMP control.
ISPD 2010: 105-111 |
| 7 | | Chin-Hsiung Hsu,
Huang-Yu Chen,
Yao-Wen Chang:
Multilayer Global Routing With Via and Wire Capacity Considerations.
IEEE Trans. on CAD of Integrated Circuits and Systems 29(5): 685-696 (2010) |
| 2009 |
|---|
| 6 | | Huang-Yu Chen,
Chin-Hsiung Hsu,
Yao-Wen Chang:
High-performance global routing with fast overflow reduction.
ASP-DAC 2009: 582-587 |
| 5 | | Huang-Yu Chen,
Szu-Jui Chou,
Sheng-Lung Wang,
Yao-Wen Chang:
A Novel Wire-Density-Driven Full-Chip Routing System for CMP Variation Control.
IEEE Trans. on CAD of Integrated Circuits and Systems 28(2): 193-206 (2009) |
| 2008 |
|---|
| 4 | | Chin-Hsiung Hsu,
Huang-Yu Chen,
Yao-Wen Chang:
Multi-layer global routing considering via and wire capacities.
ICCAD 2008: 350-355 |
| 3 | | Huang-Yu Chen,
Mei-Fang Chiang,
Yao-Wen Chang,
Lumdo Chen,
Brian Han:
Full-Chip Routing Considering Double-Via Insertion.
IEEE Trans. on CAD of Integrated Circuits and Systems 27(5): 844-857 (2008) |
| 2007 |
|---|
| 2 | | Huang-Yu Chen,
Szu-Jui Chou,
Sheng-Lung Wang,
Yao-Wen Chang:
Novel wire density driven full-chip routing for CMP variation control.
ICCAD 2007: 831-838 |
| 2006 |
|---|
| 1 | | Huang-Yu Chen,
Mei-Fang Chiang,
Yao-Wen Chang,
Lumdo Chen,
Brian Han:
Novel full-chip gridless routing considering double-via insertion.
DAC 2006: 755-760 |
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