Hsien-Te Chen

	2011
3		Hsien-Te Chen, Hong-Long Lin, Zi-Cheng Wang, TingTing Hwang: A new architecture for power network in 3D IC. DATE 2011: 401-406
	2010
2		Hsien-Te Chen, Chieh-Chun Chang, TingTing Hwang: Reconfigurable ECO Cells for Timing Closure and IR Drop Minimization. IEEE Trans. VLSI Syst. 18(12): 1686-1695 (2010)
	2009
1		Hsien-Te Chen, Chieh-Chun Chang, TingTing Hwang: New spare cell design for IR drop minimization in Engineering Change Order. DAC 2009: 402-407

Coauthor Index

1	Chieh-Chun Chang	[1] [2]
2	TingTing Hwang	[1] [2] [3]
3	Hong-Long Lin	[3]
4	Zi-Cheng Wang	[3]

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