 | 2010 |
|---|
| 7 |       | Boyuan Yan,
Sheldon X.-D. Tan,
Gengsheng Chen,
Yici Cai:
Efficient model reduction of interconnects via double gramians approximation.
ASP-DAC 2010: 25-30 |
| 6 | | Hai Wang,
Sheldon X.-D. Tan,
Gengsheng Chen:
Wideband reduced modeling of interconnect circuits by adaptive complex-valued sampling method.
ASP-DAC 2010: 31-36 |
| 5 | | Yiou Chen,
Jianhao Hu,
Gengsheng Chen,
Xiang Ling:
Energy and delay-aware mapping for real-time digital processing system on network on chip platforms.
SoCC 2010: 375-378 |
| 4 | | Ruijing Shen,
Sheldon X.-D. Tan,
Jian Cui,
Wenjian Yu,
Yici Cai,
Gengsheng Chen:
Variational Capacitance Extraction and Modeling Based on Orthogonal Polynomial Method.
IEEE Trans. VLSI Syst. 18(11): 1556-1566 (2010) |
| 2009 |
|---|
| 3 | | Duo Li,
Sheldon X.-D. Tan,
Gengsheng Chen,
Xuan Zeng:
Statistical analysis of on-chip power grid networks by variational extended truncated balanced realization method.
ASP-DAC 2009: 272-277 |
| 2008 |
|---|
| 2 | | Jian Cui,
Gengsheng Chen,
Ruijing Shen,
Sheldon X.-D. Tan,
Wenjian Yu,
Jiarong Tong:
Variational capacitance modeling using orthogonal polynomial method.
ACM Great Lakes Symposium on VLSI 2008: 23-28 |
| 1 | | Boyuan Yan,
Sheldon X.-D. Tan,
Gengsheng Chen,
Lifeng Wu:
Modeling and simulation for on-chip power grid networks by locally dominant Krylov subspace method.
ICCAD 2008: 744-749 |
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