Chung-Jung Chen

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2008

2 Ling-Huey Su, Chung-Jung Chen: Minimizing total tardiness on a single machine with unequal release dates. European Journal of Operational Research 186(2): 496-503 (2008)

1994

1 Chung-Jung Chen, Wu-Shiung Feng: Transient Sensitivity Computation of MOSFET Circuits Using Iterated Timing Analysis and Selective-Tracing Waveform Eelaxation. DAC 1994: 581-585

	2008
2		Ling-Huey Su, Chung-Jung Chen: Minimizing total tardiness on a single machine with unequal release dates. European Journal of Operational Research 186(2): 496-503 (2008)
	1994
1		Chung-Jung Chen, Wu-Shiung Feng: Transient Sensitivity Computation of MOSFET Circuits Using Iterated Timing Analysis and Selective-Tracing Waveform Eelaxation. DAC 1994: 581-585

Coauthor Index

1 Wu-Shiung Feng [1]

2 Ling-Huey Su [2]

Colors in the list of coauthors

Last update Tue May 29 01:28:40 2012 CET by the DBLP Team —

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