Cheng-Hsien Chen

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2003

3 Cheng-Hsien Chen, Chen-Yi Lee: Two-level hierarchical Z-buffer with compression technique for 3D graphics hardware. The Visual Computer 19(7-8): 467-479 (2003)

2002

2 Cheng-Hsien Chen, Chen-Yi Lee: Reduce the Memory Bandwidth of 3D Graphics Hardware with a Novel Rasterizer. Journal of Circuits, Systems, and Computers 11(4): 377-392 (2002)

1999

1 Cheng-Hsien Chen, Chen-Yi Lee: A Cost-Effective Lighting Processor for 3D Graphics Application. ICIP (2) 1999: 792-796

	2003
3		Cheng-Hsien Chen, Chen-Yi Lee: Two-level hierarchical Z-buffer with compression technique for 3D graphics hardware. The Visual Computer 19(7-8): 467-479 (2003)
	2002
2		Cheng-Hsien Chen, Chen-Yi Lee: Reduce the Memory Bandwidth of 3D Graphics Hardware with a Novel Rasterizer. Journal of Circuits, Systems, and Computers 11(4): 377-392 (2002)
	1999
1		Cheng-Hsien Chen, Chen-Yi Lee: A Cost-Effective Lighting Processor for 3D Graphics Application. ICIP (2) 1999: 792-796

Coauthor Index

1 Chen-Yi Lee [1] [2] [3]

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