Charlie Chung-Ping Chen

Chung-Ping Chen

	2012
81		Min-Han Hsieh, Liang-Hsin Chen, Shen-Iuan Liu, Charlie Chung-Ping Chen: A 6.7MHz-to-1.24GHz 0.0318mm2 fast-locking all-digital DLL in 90nm CMOS. ISSCC 2012: 244-246
	2011
80		Chia-Ping Shen, Chih-Min Chan, Feng-Sheng Lin, Ming-Jang Chiu, Jeng-Wei Lin, Jui-Hung Kao, Chung-Ping Chen, Feipei Lai: Epileptic Seizure Detection for Multichannel EEG Signals with Support Vector Machines. BIBE 2011: 39-43
79		Yu-Shun Wang, Min-Han Hsieh, Chia-Ming Liu, Chi-Wei Liu, James Chien-Mo Li, Charlie Chung-Ping Chen: An at-speed self-testable technique for the high speed domino adder. CICC 2011: 1-4
78		Yu-Shun Wang, Min-Han Hsieh, Chia-Ming Liu, Yi-Chi Wu, Bing-Feng Lin, Hsien-Chen Chiu, Charlie Chung-Ping Chen: A 1.2V 6.4GHz 181ps 64-bit CD domino adder with DLL measurement technique. ISCAS 2011: 1423-1426
77		Yu-Shun Wang, Min-Han Hsieh, Yi-Chi Wu, Chia-Ming Liu, Hsien-Chen Chiu, Bing-Feng Lin, Charlie Chung-Ping Chen: A 12 Gb/s chip-to-chip AC coupled transceiver. ISCAS 2011: 1692-1695
	2010
76		Dongkeun Oh, Nam Sung Kim, Charlie Chung-Ping Chen, Azadeh Davoodi, Yu Hen Hu: Runtime temperature-based power estimation for optimizing throughput of thermal-constrained multi-core processors. ASP-DAC 2010: 593-599
75		Jun-Kuei Zeng, Chung-Ping Chen: Interconnect delay and slew metrics using the beta distribution. DATE 2010: 1329-1332
74		Jun-Kuei Zeng, Chung-Ping Chen: Interconnect delay and slew metrics using the extreme value distribution. ISQED 2010: 818-823
73		Dongkeun Oh, Charlie Chung-Ping Chen, Nam Sung Kim, Yu Hen Hu: The compatibility analysis of thread migration and DVFS in multi-core processor. ISQED 2010: 866-871
72		Jui-Hsiang Liu, Ming-Feng Tsai, Lumdo Chen, Charlie Chung-Ping Chen: Accurate and Analytical Statistical Spatial Correlation Modeling Based on Singular Value Decomposition for VLSI DFM Applications. IEEE Trans. on CAD of Integrated Circuits and Systems 29(4): 580-589 (2010)
	2008
71		Sanghamitra Roy, Yu Hen Hu, Charlie Chung-Ping Chen, Shih-Pin Hung, Tse-Yu Chiang, Jiuan-Guei Tseng: An optimal algorithm for sizing sequential circuits for industrial library based designs. ASP-DAC 2008: 148-151
70		Tuck Boon Chan, Hsin-Chia Lu, Jun-Kuei Zeng, Charlie Chung-Ping Chen: LTCC spiral inductor modeling, synthesis, and optimization. ASP-DAC 2008: 768-771
69		Jui-Hsiang Liu, Ming-Feng Tsai, Lumdo Chen, Charlie Chung-Ping Chen: Accurate and analytical statistical spatial correlation modeling for VLSI DFM applications. DAC 2008: 694-697
68		Jun-Kuei Zeng, Chung-Ping Chen: Deep Submicron Interconnect Timing Model with Quadratic Random Variable Analysis. DATE 2008: 1091-1094
67		Jui-Hsiang Liu, Jun-Kuei Zeng, Ai-Syuan Hong, Lumdo Chen, Charlie Chung-Ping Chen: Process-Variation Statistical Modeling for VLSI Timing Analysis. ISQED 2008: 730-733
66		Chung-Ping Chen, Ying-Wen Bai, Yin-Sheng Lee: Performance measurement and queueing analysis of medium-high blocking probability of two and three parallel connection servers. LCN 2008: 568-569
	2007
65		Sanghamitra Roy, Charlie Chung-Ping Chen: SmartSmooth: A linear time convexity preserving smoothing algorithm for numerically convex data with application to VLSI design. ASP-DAC 2007: 559-564
64		Dongkeun Oh, Charlie Chung-Ping Chen, Yu Hen Hu: 3DFFT: Thermal Analysis of Non-Homogeneous IC Using 3D FFT Green Function Method. ISQED 2007: 567-572
63		Sanghamitra Roy, Weijen Chen, Charlie Chung-Ping Chen, Yu Hen Hu: Numerically Convex Forms and Their Application in Gate Sizing. IEEE Trans. on CAD of Integrated Circuits and Systems 26(9): 1637-1647 (2007)
	2006
62		Lizheng Zhang, Jeng-Liang Tsai, Weijen Chen, Yuhen Hu, Charlie Chung-Ping Chen: Convergence-provable statistical timing analysis with level-sensitive latches and feedback loops. ASP-DAC 2006: 941-946
61		Lizheng Zhang, Yuhen Hu, Charlie Chung-Ping Chen: Statistical timing analysis with path reconvergence and spatial correlations. DATE 2006: 528-532
60		Pei-Yu Huang, Yu-Min Lee, Jeng-Liang Tsai, Charlie Chung-Ping Chen: Simultaneous area minimization and decaps insertion for power delivery network using adjoint sensitivity analysis with IEKS method. ISCAS 2006
59		Lizheng Zhang, Jun Shao, Charlie Chung-Ping Chen: Non-gaussian statistical parameter modeling for SSTA with confidence interval analysis. ISPD 2006: 33-38
58		Sanghamitra Roy, Charlie Chung-Ping Chen: ConvexSmooth: A simultaneous convex fitting and smoothing algorithm for convex optimization problems. ISQED 2006: 665-670
57		Lizheng Zhang, Weijen Chen, Yuhen Hu, John A. Gubner, Charlie Chung-Ping Chen: Correlation-Preserved Statistical Timing With a Quadratic Form of Gaussian Variables. IEEE Trans. on CAD of Integrated Circuits and Systems 25(11): 2437-2449 (2006)
56		Lizheng Zhang, Weijen Chen, Yuhen Hu, Charlie Chung-Ping Chen: Statistical static timing analysis with conditional linear MAX/MIN approximation and extended canonical timing model. IEEE Trans. on CAD of Integrated Circuits and Systems 25(6): 1183-1191 (2006)
	2005
55		Vikas Sharma, Chien-Liang Chen, Chung-Ping Chen: 1-V 7-mW dual-band fast-locked frequency synthesizer. ACM Great Lakes Symposium on VLSI 2005: 431-435
54		Rong Jiang, Charlie Chung-Ping Chen: Comprehensive frequency dependent interconnect extraction and evaluation methodology. ASP-DAC 2005: 1070-1073
53		Jeng-Liang Tsai, Charlie Chung-Ping Chen: Process-variation robust and low-power zero-skew buffered clock-tree synthesis using projected scan-line sampling. ASP-DAC 2005: 1168-1171
52		Lizheng Zhang, Yuhen Hu, Charlie Chung-Ping Chen: Wave-pipelined on-chip global interconnect. ASP-DAC 2005: 127-132
51		Lizheng Zhang, Yuhen Hu, Charlie Chung-Ping Chen: Block based statistical timing analysis with extended canonical timing model. ASP-DAC 2005: 250-253
50		Hsinwei Chou, Yu-Hao Wang, Charlie Chung-Ping Chen: Fast and effective gate-sizing with multiple-Vt assignment using generalized Lagrangian Relaxation. ASP-DAC 2005: 381-386
49		Rong Jiang, Yi-Hao Chang, Charlie Chung-Ping Chen: ICCAP: a linear time sparse transformation and reordering algorithm for 3D BEM capacitance extraction. DAC 2005: 163-166
48		Lizheng Zhang, Weijen Chen, Yuhen Hu, John A. Gubner, Charlie Chung-Ping Chen: Correlation-preserved non-gaussian statistical timing analysis with quadratic timing model. DAC 2005: 83-88
47		Lizheng Zhang, Weijen Chen, Yuhen Hu, Charlie Chung-Ping Chen: Statistical Timing Analysis with Extended Pseudo-Canonical Timing Model. DATE 2005: 952-957
46		Rong Jiang, Wenyin Fu, Janet Meiling Wang, Vince Lin, Charlie Chung-Ping Chen: Efficient statistical capacitance variability modeling with orthogonal principle factor analysis. ICCAD 2005: 683-690
45		Janet Meiling Wang, Bharat Srinivas, Dongsheng Ma, Charlie Chung-Ping Chen, Jun Li: System-level power and thermal modeling and analysis by orthogonal polynomial based response surface approach (OPRS). ICCAD 2005: 728-735
44		Jeng-Liang Tsai, Dong Hyun Baik, Charlie Chung-Ping Chen, Kewal K. Saluja: False Path and Clock Scheduling Based Yield-Aware Gate Sizing. VLSI Design 2005: 423-426
43		Jeng-Liang Tsai, Dong Hyun Baik, Charlie Chung-Ping Chen, Kewal K. Saluja: Yield-Driven, False-Path-Aware Clock Skew Scheduling. IEEE Design & Test of Computers 22(3): 214-222 (2005)
42		Rong Jiang, Wenyin Fu, Charlie Chung-Ping Chen: EPEEC: comprehensive SPICE-compatible reluctance extraction for high-speed interconnects above lossy multilayer substrates. IEEE Trans. on CAD of Integrated Circuits and Systems 24(10): 1562-1571 (2005)
41		Yu-Min Lee, Yahong Cao, Tsung-Hao Chen, Janet Meiling Wang, Charlie Chung-Ping Chen: HiPRIME: hierarchical and passivity preserved interconnect macromodeling engine for RLKC power delivery. IEEE Trans. on CAD of Integrated Circuits and Systems 24(6): 797-806 (2005)
	2004
40		Clement Luk, Tsung-Hao Chen, Charlie Chung-Ping Chen: Frequency-dependent reluctance extraction. ASP-DAC 2004: 792-797
39		Lizheng Zhang, Yuhen Hu, Charlie Chung-Ping Chen: Statistical timing analysis in sequential circuit for on-chip global interconnect pipelining. DAC 2004: 904-907
38		Rong Jiang, Charlie Chung-Ping Chen: Realizable Reduction for Electromagnetically Coupled RLMC Interconnects. DATE 2004: 1400-1401
37		Ting-Yuan Wang, Jeng-Liang Tsai, Charlie Chung-Ping Chen: Thermal and Power Integrity Based Power/Ground Networks Optimization. DATE 2004: 830-835
36		Rong Jiang, Charlie Chung-Ping Chen: SCORE: SPICE COmpatible Reluctance Extraction. DATE 2004: 948-953
35		Jeng-Liang Tsai, Dong Hyun Baik, Charlie Chung-Ping Chen, Kewal K. Saluja: A yield improvement methodology using pre- and post-silicon statistical clock scheduling. ICCAD 2004: 611-618
34		Ting-Yuan Wang, Jeng-Liang Tsai, Charlie Chung-Ping Chen: Sensitivity guided net weighting for placement driven synthesis. ISPD 2004: 124-131
33		Ting-Yuan Wang, Charlie Chung-Ping Chen: SPICE-Compatible Thermal Simulation with Lumped Circuit Modeling for Thermal Reliability Analysis Based on Modeling Order Reduction. ISQED 2004: 357-362
32		Jeng-Liang Tsai, Tsung-Hao Chen, Charlie Chung-Ping Chen: Zero skew clock-tree optimization with buffer insertion/sizing and wire sizing. IEEE Trans. on CAD of Integrated Circuits and Systems 23(4): 565-572 (2004)
	2003
31		Yu-Min Lee, Charlie Chung-Ping Chen: The Power Grid Transient Simulation in Linear Time Based on 3D Alternating-Direction-Implicit Method . DATE 2003: 11020-11025
30		Tsung-Hao Chen, Clement Luk, Charlie Chung-Ping Chen: SuPREME: Substrate and Power-delivery Reluctance-Enhanced Macromodel Evaluation. ICCAD 2003: 786-792
29		Rong Jiang, Tsung-Hao Chen, Charlie Chung-Ping Chen: PODEA: Power delivery efficient analysis with realizable model reduction. ISCAS (4) 2003: 608-611
28		Ting-Yuan Wang, Yu-Min Lee, Charlie Chung-Ping Chen: 3D thermal-ADI: an efficient chip-level transient thermal simulator. ISPD 2003: 10-17
27		Jeng-Liang Tsai, Tsung-Hao Chen, Charlie Chung-Ping Chen: Optimal minimum-delay/area zero-skew clock tree wire-sizing in pseudo-polynomial time. ISPD 2003: 166-173
26		Ting-Yuan Wang, Charlie Chung-Ping Chen: Thermal-ADI - a linear-time chip-level dynamic thermal-simulation algorithm based on alternating-direction-implicit (ADI) method. IEEE Trans. VLSI Syst. 11(4): 691-700 (2003)
25		Yu-Min Lee, Charlie Chung-Ping Chen: The power grid transient simulation in linear time based on 3-D alternating-direction-implicit method. IEEE Trans. on CAD of Integrated Circuits and Systems 22(11): 1545-1550 (2003)
24		Tsung-Hao Chen, Clement Luk, Charlie Chung-Ping Chen: INDUCTWISE: inductance-wise interconnect simulator and extractor. IEEE Trans. on CAD of Integrated Circuits and Systems 22(7): 884-894 (2003)
	2002
23		Yahong Cao, Yu-Min Lee, Tsung-Hao Chen, Charlie Chung-Ping Chen: HiPRIME: hierarchical and passivity reserved interconnect macromodeling engine for RLKC power delivery. DAC 2002: 379-384
22		Tsung-Hao Chen, Clement Luk, Hyungsuk Kim, Charlie Chung-Ping Chen: INDUCTWISE: inductance-wise interconnect simulator and extractor. ICCAD 2002: 215-220
21		Ting-Yuan Wang, Charlie Chung-Ping Chen: Optimization of the Power/Ground Network Wire-Sizing and Spacing Based on Sequential Network Simplex Algorithm. ISQED 2002: 157-162
20		Charlie Chung-Ping Chen, Ed Cheng: Future SoC Design Challenges and Solutions (invited). ISQED 2002: 534-538
19		Yu-Min Lee, Charlie Chung-Ping Chen: Power grid transient simulation in linear time based on transmission-line-modeling alternating-direction-implicit method. IEEE Trans. on CAD of Integrated Circuits and Systems 21(11): 1343-1352 (2002)
18		Ting-Yuan Wang, Charlie Chung-Ping Chen: 3-D Thermal-ADI: a linear-time chip level transient thermal simulator. IEEE Trans. on CAD of Integrated Circuits and Systems 21(12): 1434-1445 (2002)
	2001
17		Yu-Min Lee, Charlie Chung-Ping Chen: Hierarchical model order reduction for signal-integrity interconnect synthesis. ACM Great Lakes Symposium on VLSI 2001: 109-114
16		Yu-Min Lee, Hing Yin Lai, Charlie Chung-Ping Chen: Optimal spacing and capacitance padding for general clock structures. ASP-DAC 2001: 115-119
15		Tsung-Hao Chen, Charlie Chung-Ping Chen: Efficient Large-Scale Power Grid Analysis Based on Preconditioned Krylov-Subspace Iterative Methods. DAC 2001: 559-562
14		Yu-Min Lee, Charlie Chung-Ping Chen: Power Grid Transient Simulation in Linear Time Based on Transmission-Line-Modeling Alternating-Direction-Implicit Method. ICCAD 2001: 75-
13		Pradeepsunder Ganesh, Charlie Chung-Ping Chen: RC-in RC-out Model Order Reduction Accurate up to Second Order Moments. ICCD 2001: 505-506
12		Saisanthosh Balakrishnan, Jong Hyuk Park, Hyungsuk Kim, Yu-Min Lee, Charlie Chung-Ping Chen: Linear Time Hierarchical Capacitance Extraction without Multipole Expansion. ICCD 2001: 98-103
11		Ting-Yuan Wang, Charlie Chung-Ping Chen: Thermal-ADI: a linear-time chip-level dynamic thermal simulation algorithm based on alternating-direction-implicit (ADI) method. ISPD 2001: 238-243
	2000
10		Charlie Chung-Ping Chen, Tae-Woo Lee, Narayanan Murugesan, Susan C. Hagness: Generalized FDTD-ADI: An Unconditionally Stable Full-Wave Maxwell's Equations Solver for VLSI Interconnect Modeling. ICCAD 2000: 156-163
	1999
9		Chung-Ping Chen, Noel Menezes: Noise-Aware Repeater Insertion and Wire-Sizing for On-Chip Interconnect Using Hierarchical Moment-Matching. DAC 1999: 502-506
8		Chung-Ping Chen, D. F. Wong: Error Bounded Padé Approximation via Bilinear Conformal Transformation. DAC 1999: 7-12
7		Noel Menezes, Chung-Ping Chen: Spec-Based Repeater Insertion and Wire Sizing for On-chip Interconnect. VLSI Design 1999: 476-
6		Chung-Ping Chen, Chris C. N. Chu, Martin D. F. Wong: Fast and exact simultaneous gate and wire sizing by Lagrangian relaxation. IEEE Trans. on CAD of Integrated Circuits and Systems 18(7): 1014-1025 (1999)
	1998
5		Chung-Ping Chen, Chris C. N. Chu, D. F. Wong: Fast and exact simultaneous gate and wire sizing by Lagrangian relaxation. ICCAD 1998: 617-624
	1997
4		Chung-Ping Chen, D. F. Wong: Optimal Wire-Sizing Function with Fringing Capacitance Consideration. DAC 1997: 604-607
	1996
3		Chung-Ping Chen, Yao-Wen Chang, D. F. Wong: Fast Performance-Driven Optimization for Buffered Clock Trees Based on Lagrangian Relaxation. DAC 1996: 405-408
2		Chung-Ping Chen, Yao-Ping Chen, D. F. Wong: Optimal Wire-Sizing Formular Under the Elmore Delay Model. DAC 1996: 487-490
1		Chung-Ping Chen, Hai Zhou, D. F. Wong: Optimal non-uniform wire-sizing under the Elmore delay model. ICCAD 1996: 38-43

Coauthor Index

1	Ying-Wen Bai	[66]
2	Dong Hyun Baik	[35] [43] [44]
3	Saisanthosh Balakrishnan	[12]
4	Yahong Cao	[23] [41]
5	Chih-Min Chan	[80]
6	Tuck Boon Chan	[70]
7	Yao-Wen Chang	[3]
8	Yi-Hao Chang	[49]
9	Chien-Liang Chen	[55]
10	Liang-Hsin Chen	[81]
11	Lumdo Chen	[67] [69] [72]
12	Tsung-Hao Chen	[15] [22] [23] [24] [27] [29] [30] [32] [40] [41]
13	Weijen Chen	[47] [48] [56] [57] [62] [63]
14	Yao-Ping Chen	[2]
15	Ed Cheng	[20]
16	Tse-Yu Chiang	[71]
17	Hsien-Chen Chiu	[77] [78]
18	Ming-Jang Chiu	[80]
19	Hsinwei Chou	[50]
20	Chris C. N. Chu (Chris Chu, Chris Chong-Nuen Chu)	[5] [6]
21	Azadeh Davoodi	[76]
22	Wenyin Fu	[42] [46]
23	Pradeepsunder Ganesh	[13]
24	John A. Gubner	[48] [57]
25	Susan C. Hagness	[10]
26	Ai-Syuan Hong	[67]
27	Min-Han Hsieh	[77] [78] [79] [81]
28	Yu Hen Hu	[63] [64] [71] [73] [76]
29	Yuhen Hu	[39] [47] [48] [51] [52] [56] [57] [61] [62]
30	Pei-Yu Huang	[60]
31	Shih-Pin Hung	[71]
32	Rong Jiang	[29] [36] [38] [42] [46] [49] [54]
33	Jui-Hung Kao	[80]
34	Hyungsuk Kim	[12] [22]
35	Nam Sung Kim	[73] [76]
36	Feipei Lai	[80]
37	Hing Yin Lai	[16]
38	Tae-Woo Lee	[10]
39	Yin-Sheng Lee	[66]
40	Yu-Min Lee	[12] [14] [16] [17] [19] [23] [25] [28] [31] [41] [60]
41	Chien-Mo James Li (James Chien-Mo Li, J. C.-M. Li)	[79]
42	Jun Li	[45]
43	Bing-Feng Lin	[77] [78]
44	Feng-Sheng Lin	[80]
45	Jeng-Wei Lin	[80]
46	Vince Lin	[46]
47	Chi-Wei Liu	[79]
48	Chia-Ming Liu	[77] [78] [79]
49	Jui-Hsiang Liu	[67] [69] [72]
50	Shen-Iuan Liu	[81]
51	Hsin-Chia Lu	[70]
52	Clement Luk	[22] [24] [30] [40]
53	Dongsheng Ma	[45]
54	Noel Menezes	[7] [9]
55	Narayanan Murugesan	[10]
56	Dongkeun Oh	[64] [73] [76]
57	Jong Hyuk Park (James J. Park)	[12]
58	Sanghamitra Roy	[58] [63] [65] [71]
59	Kewal K. Saluja	[35] [43] [44]
60	Jun Shao	[59]
61	Vikas Sharma	[55]
62	Chia-Ping Shen	[80]
63	Bharat Srinivas	[45]
64	Jeng-Liang Tsai	[27] [32] [34] [35] [37] [43] [44] [53] [60] [62]
65	Ming-Feng Tsai	[69] [72]
66	Jiuan-Guei Tseng	[71]
67	Janet Meiling Wang (Janet Meiling Wang Roveda)	[41] [45] [46]
68	Ting-Yuan Wang	[11] [18] [21] [26] [28] [33] [34] [37]
69	Yu-Hao Wang	[50]
70	Yu-Shun Wang	[77] [78] [79]
71	Martin D. F. Wong (D. F. Wong)	[1] [2] [3] [4] [5] [6] [8]
72	Yi-Chi Wu	[77] [78]
73	Jun-Kuei Zeng	[67] [68] [70] [74] [75]
74	Lizheng Zhang	[39] [47] [48] [51] [52] [56] [57] [59] [61] [62]
75	Hai Zhou	[1]

Colors in the list of coauthors

Last update Tue May 29 01:28:40 2012 CET by the DBLP Team — Data released under the ODC-BY 1.0 license — See also our legal information page