Indrajit Chaudhuri

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1998

1 Debesh K. Das, Indrajit Chaudhuri, Bhargab B. Bhattacharya: Design of an Optimal Test Pattern Generator for Built-in Self Testing of Path Delay Faults. VLSI Design 1998: 205-

	1998
1		Debesh K. Das, Indrajit Chaudhuri, Bhargab B. Bhattacharya: Design of an Optimal Test Pattern Generator for Built-in Self Testing of Path Delay Faults. VLSI Design 1998: 205-

Coauthor Index

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1	Bhargab B. Bhattacharya	[1]
2	Debesh Kumar Das (Debesh K. Das)	[1]