Wang Jiang Chau

	2011
13		Carlos Ivan Castro Marquez, Edgar Leonardo Romero Tobar, Marius Strum, Wang Jiang Chau: A Functional Verification Methodology Based on Parameter Domains for Efficient Input Stimuli Generation and Coverage Modeling. J. Electronic Testing 27(4): 485-503 (2011)
	2010
12		Johanna Sepúlveda, Marius Strum, Wang Jiang Chau, Ricardo Pires: The LRD traffic impact on the NoC-based SoCs. SBCCI 2010: 97-102
11		Johanna Sepúlveda, Ricardo Pires, Marius Strum, Wang Jiang Chau: Implementation of QoSS (Quality-of-Security Service) for NoC-Based SoC Protection. Transactions on Computational Science 10: 187-201 (2010)
	2009
10		Raul Acosta Hernandez, Marius Strum, Wang Jiang Chau, Jose Artur Quilici Gonzalez: The Multiple Pairs SMO: A modified SMO algorithm for the acceleration of the SVM training. IJCNN 2009: 1221-1228
9		Carlos Ivan Castro Marquez, Marius Strum, Wang Jiang Chau: A PD-based methodology to enhance efficiency in testbenches with random stimulation. SBCCI 2009
	2007
8		Frederico De Faria, Marius Strum, Wang Jiang Chau: A System-level Performance Evaluation Methodology for Network Processors Based on Network Calculus Analytical Modeling. ISVLSI 2007: 265-272
	2005
7		Edgar L. Romero, Marius Strum, Wang Jiang Chau: Comparing two testbench methods for hierarchical functional verification of a bluetooth baseband adaptor. CODES+ISSS 2005: 327-332
6		John Esquiagola, Guilherme Ozari, Marcio Yukio Teruya, Marius Strum, Wang Jiang Chau: A Dynamically Reconfigurable Bluetooth Base Band Unit. FPL 2005: 148-152
5		Duarte Lopes de Oliveira, Marius Strum, Wang Jiang Chau: Miriã_SI: a tool for the synthesis of speed-independent multi burst-mode controllers. SBCCI 2005: 56-61
	2003
4		Duarte Lopes de Oliveira, Marius Strum, Wang Jiang Chau, W. C. Cunha: Miriã: a CAD tool to synthesize multi-burst controllers for heterogeneous systems. Microelectronics Reliability 43(2): 209-215 (2003)
	1999
3		Marcio Yukio Teruya, Marius Strum, Wang Jiang Chau: Architectural Transformations for Hierarchical Algorithmic Descriptions. VLSI 1999: 473-484
	1998
2		Paulo Sérgio Cardoso, Marius Strum, José Roberto de A. Amazonas, Wang Jiang Chau: A Methodology for Minimum Area Cellular Automata Generation. Asian Test Symposium 1998: 33-
	1995
1		Wang Jiang Chau, Edward P. Stabler: Collective Test Generation and Test Set Compaction. ISCAS 1995: 2008-2011

Coauthor Index

1	José Roberto de A. Amazonas	[2]
2	Paulo Sérgio Cardoso	[2]
3	W. C. Cunha	[4]
4	John Esquiagola	[6]
5	Frederico De Faria	[8]
6	Jose Artur Quilici Gonzalez	[10]
7	Raul Acosta Hernandez	[10]
8	Carlos Ivan Castro Marquez	[9] [13]
9	Duarte Lopes de Oliveira	[4] [5]
10	Guilherme Ozari	[6]
11	Ricardo Pires (R. Pires)	[11] [12]
12	Edgar L. Romero	[7]
13	Johanna Sepúlveda	[11] [12]
14	Edward P. Stabler (Edward P. Stabler Jr.)	[1]
15	Marius Strum	[2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13]
16	Marcio Yukio Teruya	[3] [6]
17	Edgar Leonardo Romero Tobar	[13]

Colors in the list of coauthors

Last update Tue May 29 01:28:40 2012 CET by the DBLP Team — Data released under the ODC-BY 1.0 license — See also our legal information page