Anupam Chattopadhyay

	2012
22		Sourav Sen Gupta, Anupam Chattopadhyay, Ayesha Khalid: Designing Integrated Accelerator for Stream Ciphers with Structural Similarities. IACR Cryptology ePrint Archive 2012: 48 (2012)
	2011
21		Sourav Sen Gupta, Anupam Chattopadhyay, Ayesha Khalid: HiPAcc-LTE: An Integrated High Performance Accelerator for 3GPP LTE Stream Ciphers. INDOCRYPT 2011: 196-215
20		Zoltan Endre Rakosi, Zheng Wang, Anupam Chattopadhyay: Adaptive Energy-Efficient Architecture for WCDMA Channel Estimation. ReConFig 2011: 309-314
19		Anupam Chattopadhyay, Zoltan Endre Rakosi: Combinational logic synthesis for material implication. VLSI-SoC 2011: 200-203
	2010
18		David Kammler, Ernst Martin Witte, Anupam Chattopadhyay, Bastian Bauwens, Gerd Ascheid, Rainer Leupers, Heinrich Meyr: Automatic Generation of Memory Interfaces for ASIPs. IJERTCS 1(3): 1-23 (2010)
	2009
17		Anupam Chattopadhyay, Harold Ishebabi, Xiaolin Chen, Zoltan Endre Rakosi, Kingshuk Karuri, David Kammler, Rainer Leupers, Gerd Ascheid, Heinrich Meyr: Pre- and postfabrication architecture exploration for partially reconfigurable VLIW processors. ACM Trans. Embedded Comput. Syst. 8(2): (2009)
16		Anupam Chattopadhyay, Arnab Sinha, Diandian Zhang, Rainer Leupers, Gerd Ascheid, Heinrich Meyr: Integrated verification approach during ADL-driven processor design. Microelectronics Journal 40(7): 1111-1123 (2009)
	2008
15		Anupam Chattopadhyay, Xiaolin Chen, Harold Ishebabi, Rainer Leupers, Gerd Ascheid, Heinrich Meyr: High-level Modelling and Exploration of Coarse-grained Re-configurable Architectures. DATE 2008: 1334-1339
14		Anupam Chattopadhyay, Harold Ishebabi, Xiaolin Chen, Zoltan Endre Rakosi, Kingshuk Karuri, David Kammler, Rainer Leupers, Gerd Ascheid, Heinrich Meyr: Prefabrication and postfabrication architecture exploration for partially reconfigurable VLIW processors. ACM Trans. Embedded Comput. Syst. 7(4): (2008)
13		Kingshuk Karuri, Anupam Chattopadhyay, Xiaolin Chen, David Kammler, Ling Hao, Rainer Leupers, Heinrich Meyr, Gerd Ascheid: A Design Flow for Architecture Exploration and Implementation of Partially Reconfigurable Processors. IEEE Trans. VLSI Syst. 16(10): 1281-1294 (2008)
12		Diandian Zhang, Anupam Chattopadhyay, David Kammler, Ernst Martin Witte, Gerd Ascheid, Rainer Leupers, Heinrich Meyr: Power-efficient Instruction Encoding Optimization for Various Architecture Classes. JCP 3(3): 25-38 (2008)
	2007
11		Anupam Chattopadhyay, W. Ahmed, Kingshuk Karuri, David Kammler, Rainer Leupers, Gerd Ascheid, Heinrich Meyr: Design space exploration of partially re-configurable embedded processors. DATE 2007: 319-324
10		Kingshuk Karuri, Anupam Chattopadhyay, Manuel Hohenauer, Rainer Leupers, Gerd Ascheid, Heinrich Meyr: Increasing data-bandwidth to instruction-set extensions through register clustering. ICCAD 2007: 166-171
9		Anupam Chattopadhyay, Zoltan Endre Rakosi, Kingshuk Karuri, David Kammler, Rainer Leupers, Gerd Ascheid, Heinrich Meyr: Pre- and Post-Fabrication Architecture Exploration for Partially Reconfigurable VLIW Processors. IEEE International Workshop on Rapid System Prototyping 2007: 189-194
8		Anupam Chattopadhyay, Diandian Zhang, David Kammler, Ernst Martin Witte: Power-efficient Instruction Encoding Optimization for Embedded Processors. VLSI Design 2007: 595-600
	2006
7		Anupam Chattopadhyay, B. Geukes, David Kammler, Ernst Martin Witte, Oliver Schliebusch, Harold Ishebabi, Rainer Leupers, Gerd Ascheid, Heinrich Meyr: Automatic ADL-based operand isolation for embedded processors. DATE 2006: 600-605
6		Anupam Chattopadhyay, Arnab Sinha, Diandian Zhang, Rainer Leupers, Gerd Ascheid, Heinrich Meyr: Integrated Verification Approach during ADL-Driven Processor Design. IEEE International Workshop on Rapid System Prototyping 2006: 110-118
	2005
5		Mohammad Mostafizur Rahman Mozumdar, Kingshuk Karuri, Anupam Chattopadhyay, Stefan Kraemer, Hanno Scharwächter, Heinrich Meyr, Gerd Ascheid, Rainer Leupers: Instruction Set Customization of Application Specific Processors for Network Processing: A Case Study. ASAP 2005: 154-160
4		Oliver Schliebusch, Anupam Chattopadhyay, David Kammler, Gerd Ascheid, Rainer Leupers, Heinrich Meyr, Tim Kogel: A framework for automated and optimized ASIP implementation supporting multiple hardware description languages. ASP-DAC 2005: 280-285
3		Ernst Martin Witte, Anupam Chattopadhyay, Oliver Schliebusch, David Kammler: Applying Resource Sharing Algorithms to ADL-driven Automatic ASIP Implementation. ICCD 2005: 193-199
2		Oliver Schliebusch, Anupam Chattopadhyay, Ernst Martin Witte, David Kammler, Gerd Ascheid, Rainer Leupers, Heinrich Meyr: Optimization Techniques for ADL-Driven RTL Processor Synthesis. IEEE International Workshop on Rapid System Prototyping 2005: 165-171
	2004
1		Oliver Schliebusch, Anupam Chattopadhyay, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Mario Steinert, Gunnar Braun, Achim Nohl: RTL Processor Synthesis for Architecture Exploration and Implementation. DATE 2004: 156-160

Coauthor Index

1	W. Ahmed	[11]
2	Gerd Ascheid	[1] [2] [4] [5] [6] [7] [9] [10] [11] [12] [13] [14] [15] [16] [17] [18]
3	Bastian Bauwens	[18]
4	Gunnar Braun	[1]
5	Xiaolin Chen	[13] [14] [15] [17]
6	B. Geukes	[7]
7	Ling Hao	[13]
8	Manuel Hohenauer	[10]
9	Harold Ishebabi	[7] [14] [15] [17]
10	David Kammler	[2] [3] [4] [7] [8] [9] [11] [12] [13] [14] [17] [18]
11	Kingshuk Karuri	[5] [9] [10] [11] [13] [14] [17]
12	Ayesha Khalid	[21] [22]
13	Tim Kogel	[4]
14	Stefan Kraemer	[5]
15	Rainer Leupers	[1] [2] [4] [5] [6] [7] [9] [10] [11] [12] [13] [14] [15] [16] [17] [18]
16	Heinrich Meyr	[1] [2] [4] [5] [6] [7] [9] [10] [11] [12] [13] [14] [15] [16] [17] [18]
17	Mohammad Mostafizur Rahman Mozumdar	[5]
18	Achim Nohl	[1]
19	Zoltan Endre Rakosi	[9] [14] [17] [19] [20]
20	Hanno Scharwächter	[5]
21	Oliver Schliebusch	[1] [2] [3] [4] [7]
22	Sourav Sengupta (Sourav Sen Gupta)	[21] [22]
23	Arnab Sinha	[6] [16]
24	Mario Steinert	[1]
25	Zheng Wang	[20]
26	Ernst Martin Witte	[2] [3] [7] [8] [12] [18]
27	Diandian Zhang	[6] [8] [12] [16]

Colors in the list of coauthors

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