 | 2011 |
|---|
| 9 |       | Aritra Banerjee,
Subho Chatterjee,
Azad Naeemi,
Abhijit Chatterjee:
Power Aware Post-manufacture Tuning of Analog Nanocircuits.
European Test Symposium 2011: 57-62 |
| 8 | | Subho Chatterjee,
Mitchelle Rasquinha,
Sudhakar Yalamanchili,
Saibal Mukhopadhyay:
A Scalable Design Methodology for Energy Minimization of STTRAM: A Circuit and Architecture Perspective.
IEEE Trans. VLSI Syst. 19(5): 809-817 (2011) |
| 2010 |
|---|
| 7 | | Subho Chatterjee,
Sayeef Salahuddin,
Satish Kumar,
Saibal Mukhopadhyay:
Analysis of thermal behaviors of spin-torque-transfer RAM: a simulation study.
ISLPED 2010: 13-18 |
| 6 | | Mitchelle Rasquinha,
Dhruv Choudhary,
Subho Chatterjee,
Saibal Mukhopadhyay,
Sudhakar Yalamanchili:
An energy efficient cache design using spin torque transfer (STT) RAM.
ISLPED 2010: 389-394 |
| 5 | | Subho Chatterjee,
Sayeef Salahuddin,
Saibal Mukhopadhyay:
Dual-Source-Line-Bias Scheme to Improve the Read Margin and Sensing Accuracy of STTRAM in Sub-90-nm Nodes.
IEEE Trans. on Circuits and Systems 57-II(3): 208-212 (2010) |
| 2009 |
|---|
| 4 | | Somnath Paul,
Subho Chatterjee,
Saibal Mukhopadhyay,
Swarup Bhunia:
A circuit-software co-design approach for improving EDP in reconfigurable frameworks.
ICCAD 2009: 109-112 |
| 3 | | Subho Chatterjee,
Mitchelle Rasquinha,
Sudhakar Yalamanchili,
Saibal Mukhopadhyay:
A methodology for robust, energy efficient design of Spin-Torque-Transfer RAM arrays at scaled technologies.
ICCAD 2009: 474-477 |
| 2008 |
|---|
| 2 | | Amitava Banerjee,
Subho Chatterjee,
Amit Patra,
Siddhartha Mukhopadhyay:
An efficient approach to model distortion in weakly nonlinear Gm - C filters.
ISCAS 2008: 1312-1315 |
| 1 | | Amal Kumar Kundu,
Subho Chatterjee,
Tarun Kanti Bhattacharyya:
A Fast Settling 100dB OPAMP in 180nm CMOS Process with Compensation Based Optimisation.
VLSI Design 2008: 311-316 |
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