 | 2010 |
|---|
| 4 |       | Tzu-I Tsai,
Horng-Chih Lin,
Min-Feng Jian,
Tiao-Yuan Huang,
Tien-Sheng Chao:
A simple method for sub-100 nm pattern generation with I-line double-patterning technique.
Microelectronics Reliability 50(5): 584-588 (2010) |
| 2005 |
|---|
| 3 | | Yao-Jen Lee,
Tien-Sheng Chao,
Tiao-Yuan Huang:
High voltage applications and NBTI effects of DT-pMOSFETS with reverse Schottky substrate contacts.
Microelectronics Reliability 45(7-8): 1119-1123 (2005) |
| 2002 |
|---|
| 2 | | Yiming Li,
S. M. Sze,
Tien-Sheng Chao:
A Practical Implementation of Parallel Dynamic Load Balancing for Adaptive Computing in VLSI Device Simulation.
Eng. Comput. (Lond.) 18(2): 124-137 (2002) |
| 2001 |
|---|
| 1 |  | Yiming Li,
Jinn-Liang Liu,
Tien-Sheng Chao,
S. M. Sze:
Parallel Dynamic Partition and Adaptive Computation in Semiconductor Device Simulation.
PPSC 2001 |
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