Ming-Hung Chang

	2012
15		Ming-Hung Chang, Shang-Yuan Lin, Wei Hwang: A 0.4 V 520 nW 990 μm2 Fully Integrated Frequency-Domain Smart Temperature Sensor in 65 nm CMOS. J. Low Power Electronics 8(1): 63-72 (2012)
	2011
14		Ming-Hung Chang, Chung-Ying Hsieh, Mei-Wei Chen, Wei Hwang: Near-/sub-threshold DLL-based clock generator with PVT-aware locking range compensation. ISLPED 2011: 15-20
13		Ming-Hung Chang, Yi-Te Chiu, Shu-Lin Lai, Wei Hwang: A 1kb 9T subthreshold SRAM with bit-interleaving scheme in 65nm CMOS. ISLPED 2011: 291-296
12		Ming-Hung Chang, Hung-Ching Lu: Self-organizing fuzzy neural network controller design. SMC 2011: 2273-2278
11		Wei-Hung Du, Ming-Hung Chang, Hao-Yi Yang, Wei Hwang: An energy-efficient 10T SRAM-based FIFO memory operating in near-/sub-threshold regions. SoCC 2011: 19-23
10		Hung-Ching Lu, Ming-Hung Chang, Cheng-Hung Tsai: Adaptive self-constructing fuzzy neural network controller for hardware implementation of an inverted pendulum system. Appl. Soft Comput. 11(5): 3962-3975 (2011)
	2010
9		Shi-Wen Chen, Ming-Hung Chang, Wei-Chih Hsieh, Wei Hwang: Fully on-chip temperature, process, and voltage sensors. ISCAS 2010: 897-900
8		Hung-Ching Lu, Cheng-Hung Tsai, Ming-Hung Chang: Radial basis function neural network with sliding mode control for robotic manipulators. SMC 2010: 1209-1215
	2009
7		Yi-Ming Chang, Ming-Hung Chang, Wei Hwang: A 2.1-mW 0.3V-1.0V wide locking range multiphase DLL using self-estimated SAR algorithm. SoCC 2009: 115-118
	2008
6		Li-Pu Chuang, Ming-Hung Chang, Po-Tsang Huang, Chih-Hao Kan, Wei Hwang: A 5.2mW all-digital fast-lock self-calibrated multiphase delay-locked loop. ISCAS 2008: 3342-3345
5		Ming-Hung Chang, Li-Pu Chuang, I-Ming Chang, Wei Hwang: A 300-mV 36-muW multiphase dual digital clock output generator with self-calibration. SoCC 2008: 97-100
	2007
4		Ming-Hung Chang, Zong-Xi Yang, Wei Hwang: A 1.9mW Portable ADPLL-based Frequency Synthesizer for High Speed Clock Generation. ISCAS 2007: 1137-1140
3		Ming-Hung Chang, Hung-Ching Lu, Cheng-Hung Tsai: Fuzzy neural network design with switching strategy for permanent-magnet synchronous motor speed controller. SMC 2007: 882-887
2		Chang-Hsuan Chang, Ming-Hung Chang, Wei Hwang: A flexible two-layer external memory management for H.264/AVC decoder. SoCC 2007: 219-222
1		Shien-Kuei Liaw, Ming-Hung Chang, Chun-Jung Wang, Yi-Tseng Lin: Reconfigurable Optical Add/Drop Multiplexer with 8.0 dB Net Gain Using Dual-Pass Amplified Scheme. IEICE Transactions 90-B(8): 2016-2021 (2007)

Coauthor Index

1	Chang-Hsuan Chang	[2]
2	I-Ming Chang	[5]
3	Yi-Ming Chang	[7]
4	Mei-Wei Chen	[14]
5	Shi-Wen Chen	[9]
6	Yi-Te Chiu	[13]
7	Li-Pu Chuang	[5] [6]
8	Wei-Hung Du	[11]
9	Chung-Ying Hsieh	[14]
10	Wei-Chih Hsieh	[9]
11	Po-Tsang Huang	[6]
12	Wei Hwang	[2] [4] [5] [6] [7] [9] [11] [13] [14] [15]
13	Chih-Hao Kan	[6]
14	Shu-Lin Lai	[13]
15	Shien-Kuei Liaw	[1]
16	Shang-Yuan Lin	[15]
17	Yi-Tseng Lin	[1]
18	Hung-Ching Lu	[3] [8] [10] [12]
19	Cheng-Hung Tsai	[3] [8] [10]
20	Chun-Jung Wang	[1]
21	Hao-Yi Yang	[11]
22	Zong-Xi Yang	[4]

Colors in the list of coauthors

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