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| 2012 | ||
|---|---|---|
| 20 | Meng-Fan Chang, Ching-Hao Chuang, Min-Ping Chen, Lai-Fu Chen, Hiroyuki Yamauchi, Pi-Feng Chiu, Shyh-Shyuan Sheu: Endurance-aware circuit designs of nonvolatile logic and nonvolatile sram using resistive memory (memristor) device. ASP-DAC 2012: 329-334 | |
| 19 | Meng-Fan Chang, Che-Wei Wu, Chia-Chen Kuo, Shin-Jang Shen, Ku-Feng Lin, Shu-Meng Yang, Ya-Chin King, Chorng-Jung Lin, Yu-Der Chih: A 0.5V 4Mb logic-process compatible embedded resistive RAM (ReRAM) in 65nm CMOS using low-voltage current-mode sensing scheme with 45ns random read time. ISSCC 2012: 434-436 | |
| 18 | Yen-Huei Chen, Shao-Yu Chou, Quincy Li, Wei-Min Chan, Dar Sun, Hung-Jen Liao, Ping Wang, Meng-Fan Chang, Hiroyuki Yamauchi: Compact Measurement Schemes for Bit-Line Swing, Sense Amplifier Offset Voltage, and Word-Line Pulse Width to Characterize Sensing Tolerance Margin in a 40 nm Fully Functional Embedded SRAM. J. Solid-State Circuits 47(4): 969-980 (2012) | |
| 2011 | ||
| 17 | Meng-Fan Chang, Pi-Feng Chiu, Shyh-Shyuan Sheu: Circuit design challenges in embedded memory and resistive RAM (RRAM) for mobile SoC and 3D-IC. ASP-DAC 2011: 197-203 | |
| 16 | Shyh-Shyuan Sheu, Meng-Fan Chang, Ku-Feng Lin, Che-Wei Wu, Yu-Sheng Chen, Pi-Feng Chiu, Chia-Chen Kuo, Yih-Shan Yang, Pei-Chia Chiang, Wen-Pin Lin, Che-He Lin, Heng-Yuan Lee, Peiyi Gu, Sumin Wang, Frederick T. Chen, Keng-Li Su, Chen-Hsin Lien, Kuo-Hsing Cheng, Hsin-Tun Wu, Tzu-Kun Ku, Ming-Jer Kao, Ming-Jinn Tsai: A 4Mb embedded SLC resistive-RAM macro with 7.2ns read-write random-access time and 160ns MLC-access capability. ISSCC 2011: 200-202 | |
| 15 | Meng-Fan Chang, Shin-Jang Shen, Chia-Chi Liu, Che-Wei Wu, Yu-Fan Lin, Shang-Chi Wu, Chia-En Huang, Han-Chao Lai, Ya-Chin King, Chorng-Jung Lin, Hung-Jen Liao, Yu-Der Chih, Hiroyuki Yamauchi: An offset-tolerant current-sampling-based sense amplifier for Sub-100nA-cell-current nonvolatile memory. ISSCC 2011: 206-208 | |
| 14 | Shyh-Shyuan Sheu, Kuo-Hsing Cheng, Meng-Fan Chang, Pei-Chia Chiang, Wen-Pin Lin, Heng-Yuan Lee, Pang-Shiu Chen, Yu-Sheng Chen, Frederick T. Chen, Ming-Jinn Tsai: Fast-Write Resistive RAM (RRAM) for Embedded Applications. IEEE Design & Test of Computers 28(1): 64-71 (2011) | |
| 13 | Kea-Tiong Tang, Shih-Wen Chiu, Meng-Fan Chang, Chih-Cheng Hsieh, Jyuo-Min Shyu: A Low-Power Electronic Nose Signal-Processing Chip for a Portable Artificial Olfaction System. IEEE Trans. Biomed. Circuits and Systems 5(4): 380-390 (2011) | |
| 12 | Meng-Fan Chang, Shi-Wei Chang, Po-Wei Chou, Wei-Cheng Wu: A 130 mV SRAM With Expanded Write and Read Margins for Subthreshold Applications. J. Solid-State Circuits 46(2): 520-529 (2011) | |
| 11 | Jui-Jen Wu, Yen-Hui Chen, Meng-Fan Chang, Po-Wei Chou, Chien-Yuan Chen, Hung-Jen Liao, Ming-Bin Chen, Yuan-Hua Chu, Wen-Chin Wu, Hiroyuki Yamauchi: A Large Sigma V TH /VDD Tolerant Zigzag 8T SRAM With Area-Efficient Decoupled Differential Sensing and Fast Write-Back Scheme. J. Solid-State Circuits 46(4): 815-827 (2011) | |
| 2010 | ||
| 10 | Meng-Fan Chang, Shu-Meng Yang, Chih-Wei Liang, Chih-Chyuang Chiang, Pi-Feng Chiu, Ku-Feng Lin, Yuan-Hua Chu, Wen-Chin Wu, Hiroyuki Yamauchi: A 0.29V embedded NAND-ROM in 90nm CMOS for ultra-low-voltage applications. ISSCC 2010: 266-267 | |
| 9 | Meng-Fan Chang, Yung-Chi Chen, Chien-Fu Chen: A 0.45-V 300-MHz 10T Flowthrough SRAM With Expanded write/ read Stability and Speed-Area-Wise Array for Sub-0.5-V Chips. IEEE Trans. on Circuits and Systems 57-II(12): 980-985 (2010) | |
| 8 | Meng-Fan Chang, Shu-Meng Yang, Chih-Wei Liang, Chih-Chyuang Chiang, Pi-Feng Chiu, Ku-Feng Lin: Noise-Immune Embedded NAND-ROM Using a Dynamic Split Source-Line Scheme for VDDmin and Speed Improvements. J. Solid-State Circuits 45(10): 2142-2155 (2010) | |
| 7 | Meng-Fan Chang, Jui-Jen Wu, Kuang-Ting Chen, Yung-Chi Chen, Yen-Hui Chen, Robin Lee, Hung-Jen Liao, Hiroyuki Yamauchi: A Differential Data-Aware Power-Supplied (D 2 AP) 8T SRAM Cell With Expanded Write/Read Stabilities for Lower VDDmin Applications. J. Solid-State Circuits 45(6): 1234-1245 (2010) | |
| 2009 | ||
| 6 | Meng-Fan Chang, Shu-Meng Yang: Analysis and Reduction of Supply Noise Fluctuations Induced by Embedded Via-Programming ROM. IEEE Trans. VLSI Syst. 17(6): 758-769 (2009) | |
| 5 | Meng-Fan Chang, Su-Meng Yang, Kuang-Ting Chen: Wide VDD Embedded Asynchronous SRAM With Dual-Mode Self-Timed Technique for Dynamic Voltage Systems. IEEE Trans. on Circuits and Systems 56-I(8): 1657-1667 (2009) | |
| 2006 | ||
| 4 | Ding-Ming Kwai, Yung-Fa Chou, Meng-Fan Chang, Su-Meng Yang, Ding-Sheng Chen, Min-Chung Hsu, Yu-Zhen Liao, Shiao-Yi Lin, Yu-Ling Sung, Chia-Hsin Lee, Hsin-Kun Hsu: FlexiVia ROM Compiler Programmable on Different Via Layers Based on Top Metal Assignment. MTDT 2006: 28-33 | |
| 3 | Ding-Ming Kwai, Ching-Hua Hsiao, Chung-Ping Kuo, Chi-Hsien Chuang, Min-Chung Hsu, Yi-Chun Chen, Yu-Ling Sung, Hsien-Yu Pan, Chia-Hsin Lee, Meng-Fan Chang, Yung-Fa Chou: SRAM Cell Current in Low Leakage Design. MTDT 2006: 65-70 | |
| 2005 | ||
| 2 | Meng-Fan Chang, Kuei-Ann Wen: Power and Substrate Noise Tolerance of Configurable Embedded Memories in SoC. VLSI Signal Processing 41(1): 81-91 (2005) | |
| 2004 | ||
| 1 | Meng-Fan Chang, Kuei-Ann Wen, Ding-Ming Kwai: Supply and Substrate Noise Tolerance Using Dynamic Tracking Clusters in Configurable Memory Designs. ISQED 2004: 297-302 | |
Colors in the list of coauthors
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