Hsie-Chia Chang

	2012
31		Po-Chun Liu, Hsie-Chia Chang, Chen-Yi Lee: A True Random-Based Differential Power Analysis Countermeasure Circuit for an AES Engine. IEEE Trans. on Circuits and Systems 59-II(2): 103-107 (2012)
30		Jen-Wei Lee, Ju-Hung Hsiao, Hsie-Chia Chang, Chen-Yi Lee: An Efficient DPA Countermeasure With Randomized Montgomery Operations for DF-ECC Processor. IEEE Trans. on Circuits and Systems 59-II(5): 287-291 (2012)
29		Chih-Lung Chen, Yu-Hsiang Lin, Hsie-Chia Chang, Chen-Yi Lee: A 2.37-Gb/s 284.8 mW Rate-Compatible (491, 3, 6) LDPC-CC Decoder. J. Solid-State Circuits 47(4): 817-831 (2012)
	2011
28		Po-Chun Liu, Ju-Hung Hsiao, Hsie-Chia Chang, Chen-Yi Lee: A 2.97 Gb/s DPA-resistant AES engine with self-generated random sequence. ESSCIRC 2011: 71-74
27		Chih-Hsiang Hsu, Yi-Min Lin, Hsie-Chia Chang, Chen-Yi Lee: A 2.56 Gb/s soft RS (255, 239) decoder chip for optical communication systems. ESSCIRC 2011: 79-82
26		Yao-Lin Chen, Jen-Wei Lee, Po-Chun Liu, Hsie-Chia Chang, Chen-Yi Lee: A dual-field elliptic curve cryptographic processor with a radix-4 unified division unit. ISCAS 2011: 713-716
25		Cheng-Chi Wong, Hsie-Chia Chang: High-Efficiency Processing Schedule for Parallel Turbo Decoders Using QPP Interleaver. IEEE Trans. on Circuits and Systems 58-I(6): 1412-1420 (2011)
24		Yi-Min Lin, Chi-Heng Yang, Chih-Hsiang Hsu, Hsie-Chia Chang, Chen-Yi Lee: A MPCN-Based Parallel Architecture in BCH Decoders for nand Flash Memory Devices. IEEE Trans. on Circuits and Systems 58-II(10): 682-686 (2011)
	2010
23		Chen-Yang Lin, Cheng-Chi Wong, Hsie-Chia Chang: A multiple code-rate turbo decoder based on reciprocal dual trellis architecture. ISCAS 2010: 1496-1499
22		Yi-Min Lin, Hsie-Chia Chang, Chen-Yi Lee: An improved soft BCH decoder with one extra error compensation. ISCAS 2010: 3941-3944
21		Po-Chun Liu, Hsie-Chia Chang, Chen-Yi Lee: A Low Overhead DPA Countermeasure Circuit Based on Ring Oscillators. IEEE Trans. on Circuits and Systems 57-II(7): 546-550 (2010)
20		Cheng-Chi Wong, Hsie-Chia Chang: Reconfigurable Turbo Decoder With Parallel Architecture for 3GPP LTE System. IEEE Trans. on Circuits and Systems 57-II(7): 566-570 (2010)
19		Po-Tsang Huang, Xin-Ru Lee, Hsie-Chia Chang, Chen-Yi Lee, Wei Hwang: A Low Power Differential Cascode Voltage Switch with Pass Gate Pulsed Latch for Viterbi Decoder. J. Low Power Electronics 6(4): 551-562 (2010)
18		Yi-Min Lin, Chih-Lung Chen, Hsie-Chia Chang, Chen-Yi Lee: A 26.9 K 314.5 Mb/s Soft (32400, 32208) BCH Decoder Chip for DVB-S2 System. J. Solid-State Circuits 45(11): 2330-2340 (2010)
17		Cheng-Chi Wong, Ming-Wei Lai, Chien-Ching Lin, Hsie-Chia Chang, Chen-Yi Lee: Turbo Decoder Using Contention-Free Interleaver and Parallel Architecture. J. Solid-State Circuits 45(2): 422-432 (2010)
	2009
16		Shao-Wei Yen, Ming-Chih Hu, Chin-Lung Chen, Hsie-Chia Chang, Shyh-Jye Jou, Chen-Yi Lee: A 0.92mm2 23.4mW fully-compliant CTC decoder for WiMAX 802.16e application. CICC 2009: 191-194
15		Hsie-Chia Chang, Chien-Ching Lin, Fu-Ke Chang, Chen-Yi Lee: A Universal VLSI Architecture for Reed-Solomon Error-and-Erasure Decoders. IEEE Trans. on Circuits and Systems 56-I(9): 1960-1967 (2009)
14		Chih-Hao Liu, Chien-Ching Lin, Shao-Wei Yen, Chih-Lung Chen, Hsie-Chia Chang, Chen-Yi Lee, Yar-Sun Hsu, Shyh-Jye Jou: Design of a Multimode QC-LDPC Decoder Based on Shift-Routing Network. IEEE Trans. on Circuits and Systems 56-II(9): 734-738 (2009)
	2008
13		Yi Hsuan Wu, Yu Ting Liu, Hsiu-Chi Chang, Yen-Chin Liao, Hsie-Chia Chang: Early-Pruned K-Best Sphere Decoding Algorithm Based on Radius Constraints. ICC 2008: 4496-4500
12		Yi-Kai Lin, Chin-Lung Chen, Yen-Chin Liao, Hsie-Chia Chang: Structured LDPCcodes with low error floor based on PEG tanner graphs. ISCAS 2008: 1846-1849
11		Chih-Hao Liu, Chien-Ching Lin, Hsie-Chia Chang, Chen-Yi Lee, Yarsun Hsua: Multi-mode message passing switch networks applied for QC-LDPC decoder. ISCAS 2008: 752-755
	2007
10		Hsiu-Chi Chang, Yen-Chin Liao, Hsie-Chia Chang: Low-complexity Prediction Techniques of K-best Sphere Decoding for MIMO Systems. SiPS 2007: 45-49
9		Yen-Chin Liao, Chien-Ching Lin, Hsie-Chia Chang, Chih-Wei Liu: Self-Compensation Technique for Simplified Belief-Propagation Algorithm. IEEE Transactions on Signal Processing 55(6-2): 3061-3072 (2007)
	2006
8		Hong-An Huang, Yen-Chin Liao, Hsie-Chia Chang: A self-compensation fixed-width booth multiplier and its 128-point FFT applications. ISCAS 2006
7		Yen-Chin Liao, Hsie-Chia Chang, Chih-Wei Liu: Carry Estimation for Two's Complement Fixed-Width Multipliers. SiPS 2006: 345-350
6		Chien-Ching Lin, Y.-H. Shih, Hsie-Chia Chang, Chen-Yi Lee: A low power turbo/Viterbi decoder for 3GPP2 applications. IEEE Trans. VLSI Syst. 14(4): 426-430 (2006)
	2004
5		Yi-Chen Tseng, Chien-Ching Lin, Hsie-Chia Chang, Chen-Yi Lee: A power and area efficient multi-mode FEC processor. ISCAS (2) 2004: 253-256
4		Hsie-Chia Chang, Chien-Ching Lin, Tien-Yuan Hsiao, Jieh-Tsorng Wu, Ta-Hui Wang: Multi-level memory systems using error control codes. ISCAS (2) 2004: 393-396
	2003
3		Hsie-Chia Chang, Chen-Yi Lee: A Low-Power Design for Reed-Solomon Decoders. Journal of Circuits, Systems, and Computers 12(2): 159-170 (2003)
	2001
2		Hsie-Chia Chang, Chen-Yi Lee: An area-efficient architecture for Reed-Solomon decoder using the inversionless decomposed Euclidean algorithm. ISCAS (2) 2001: 649-652
	1999
1		Hsie-Chia Chang, C. Bernard Shung: New serial architecture for the Berlekamp-Massey algorithm. IEEE Transactions on Communications 47(4): 481-483 (1999)

Coauthor Index

1	Fu-Ke Chang	[15]
2	Hsiu-Chi Chang	[10] [13]
3	Chih-Lung Chen	[14] [18] [29]
4	Chin-Lung Chen	[12] [16]
5	Yao-Lin Chen	[26]
6	Ju-Hung Hsiao	[28] [30]
7	Tien-Yuan Hsiao	[4]
8	Chih-Hsiang Hsu	[24] [27]
9	Yar-Sun Hsu	[14]
10	Yarsun Hsua	[11]
11	Ming-Chih Hu	[16]
12	Hong-An Huang	[8]
13	Po-Tsang Huang	[19]
14	Wei Hwang	[19]
15	Shyh-Jye Jou	[14] [16]
16	Ming-Wei Lai	[17]
17	Chen-Yi Lee	[2] [3] [5] [6] [11] [14] [15] [16] [17] [18] [19] [21] [22] [24] [26] [27] [28] [29] [30] [31]
18	Jen-Wei Lee	[26] [30]
19	Xin-Ru Lee	[19]
20	Yen-Chin Liao	[7] [8] [9] [10] [12] [13]
21	Chen-Yang Lin	[23]
22	Chien-Ching Lin	[4] [5] [6] [9] [11] [14] [15] [17]
23	Yi-Kai Lin	[12]
24	Yi-Min Lin	[18] [22] [24] [27]
25	Yu-Hsiang Lin	[29]
26	Chih-Hao Liu	[11] [14]
27	Chih-Wei Liu	[7] [9]
28	Po-Chun Liu	[21] [26] [28] [31]
29	Yu Ting Liu	[13]
30	Y.-H. Shih	[6]
31	C. Bernard Shung	[1]
32	Yi-Chen Tseng	[5]
33	Ta-Hui Wang	[4]
34	Cheng-Chi Wong	[17] [20] [23] [25]
35	Jieh-Tsorng Wu	[4]
36	Yi Hsuan Wu	[13]
37	Chi-Heng Yang	[24]
38	Shao-Wei Yen	[14] [16]

Colors in the list of coauthors

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