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David Chih-Wei Chang Coauthor index pubzone.org

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DBLP keys2011
5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLDavid Chih-Wei Chang, Tay-Jyi Lin, Chung-Ju Wu, Jenq Kuen Lee, Yuan-Hua Chu, An-Yeu Wu: Parallel Architecture Core (PAC) - the First Multicore Application Processor SoC in Taiwan Part I: Hardware Architecture & Software Development Tools. Signal Processing Systems 62(3): 373-382 (2011)
2006
4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLDavid Chih-Wei Chang, I-Tao Liao, Jenq Kuen Lee, Wen-Feng Chen, Shau-Yin Tseng, Chein-Wei Jen: PAC DSP Core and Application Processors. ICME 2006: 289-292
1995
3no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLDavid Chih-Wei Chang, David Lyon, Charles Chen, Leon Peng, Mehran Massoumi, Matthew Hakimi, Satish Iyengar, Ellen Li, Roque Remedios: Microarchitecture of HaL's Memory Management Unit. COMPCON 1995: 272-279
2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLNirmal R. Saxena, David Chih-Wei Chang, Kevin Dawallu, Jaspal Kohli, Pat Helland: Fault-Tolerant Features in the HaL Memory Management Unit. IEEE Trans. Computers 44(2): 170-180 (1995)
1993
1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLDavid Chih-Wei Chang, Nirmal R. Saxena: Concurrent Error Detection/Correction in the HAL MMU Chip. FTCS 1993: 630-635

Coauthor Index

1Charles Chen [3]
2Wen-Feng Chen [4]
3Yuan-Hua Chu [5]
4Kevin Dawallu [2]
5Matthew Hakimi [3]
6Pat Helland [2]
7Satish Iyengar [3]
8Chein-Wei Jen [4]
9Jaspal Kohli [2]
10Jenq Kuen Lee [4] [5]
11Ellen Li [3]
12I-Tao Liao [4]
13Tay-Jyi Lin [5]
14David Lyon [3]
15Mehran Massoumi [3]
16Leon Peng [3]
17Roque Remedios [3]
18Nirmal R. Saxena [1] [2]
19Shau-Yin Tseng [4]
20An-Yeu Wu [5]
21Chung-Ju Wu [5]

Colors in the list of coauthors

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