 | 2011 |
| 5 |  | David Chih-Wei Chang,
Tay-Jyi Lin,
Chung-Ju Wu,
Jenq Kuen Lee,
Yuan-Hua Chu,
An-Yeu Wu:
Parallel Architecture Core (PAC) - the First Multicore Application Processor SoC in Taiwan Part I: Hardware Architecture & Software Development Tools.
Signal Processing Systems 62(3): 373-382 (2011) |
| 2006 |
| 4 |  | David Chih-Wei Chang,
I-Tao Liao,
Jenq Kuen Lee,
Wen-Feng Chen,
Shau-Yin Tseng,
Chein-Wei Jen:
PAC DSP Core and Application Processors.
ICME 2006: 289-292 |
| 1995 |
| 3 |  | David Chih-Wei Chang,
David Lyon,
Charles Chen,
Leon Peng,
Mehran Massoumi,
Matthew Hakimi,
Satish Iyengar,
Ellen Li,
Roque Remedios:
Microarchitecture of HaL's Memory Management Unit.
COMPCON 1995: 272-279 |
| 2 |  | Nirmal R. Saxena,
David Chih-Wei Chang,
Kevin Dawallu,
Jaspal Kohli,
Pat Helland:
Fault-Tolerant Features in the HaL Memory Management Unit.
IEEE Trans. Computers 44(2): 170-180 (1995) |
| 1993 |
| 1 |  | David Chih-Wei Chang,
Nirmal R. Saxena:
Concurrent Error Detection/Correction in the HAL MMU Chip.
FTCS 1993: 630-635 |