 | 2011 |
|---|
| 4 |       | Kuen-Jong Lee,
Chin-Yao Chang,
I.-Jou Chen:
EPIDETOX: an ESL platform for integrated circuit design and tool exploration.
CODES+ISSS 2011: 381-384 |
| 2010 |
|---|
| 3 | | Kuen-Jong Lee,
Tong-Yu Hsieh,
Chin-Yao Chang,
Yu-Ting Hong,
Wen-Cheng Huang:
On-Chip SOC Test Platform Design Based on IEEE 1500 Standard.
IEEE Trans. VLSI Syst. 18(7): 1134-1139 (2010) |
| 2009 |
|---|
| 2 | | Chin-Yao Chang,
Chih-Yuan Hsiao,
Kuen-Jong Lee,
Alan P. Su:
Transaction Level Modeling and Design Space Exploration for SOC Test Architectures.
Asian Test Symposium 2009: 200-205 |
| 1 | | Jing-Wun Lin,
Chen-Chieh Wang,
Chin-Yao Chang,
Chung-Ho Chen,
Kuen-Jong Lee,
Yuan-Hua Chu,
Jen-Chieh Yeh,
Ying-Chuan Hsiao:
Full System Simulation and Verification Framework.
IAS 2009: 165-168 |
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