 | 2011 |
| 4 |  | Kuo-Hsing Cheng,
Cheng-Liang Hung,
Chih-Hsien Chang:
A 0.77 ps RMS Jitter 6-GHz Spread-Spectrum Clock Generator Using a Compensated Phase-Rotating Technique.
J. Solid-State Circuits 46(5): 1198-1213 (2011) |
| 2010 |
| 3 |  | Wei-Chih Chen,
Chien-Chun Tsai,
Chih-Hsien Chang,
Yung-Chow Peng,
Fu-Lung Hsueh,
Tsung-Hsin Yu,
Jinn-Yeh Chien,
Wen-Hung Huang,
Chi-Chang Lu,
Mu-Shan Lin,
Chin-Ming Fu,
Shu-Chun Yang,
Chung-Wing Wong,
Wan-Te Chen,
Chin-Hua Wen,
Li Yueh Wang,
Chiang Pu:
A 2.5-8Gb/s transceiver with 5-tap DFE and Second order CDR against 28-inch channel and 5000ppm SSC in 40nm CMOS technology.
CICC 2010: 1-4 |
| 2008 |
| 2 |  | Kuo-Hsing Cheng,
Cheng-Liang Hung,
Chih-Hsien Chang,
Yu-lung Lo,
Wei-Bin Yang,
Jiunn-Way Miaw:
A Spread-Spectrum Clock Generator Using Fractional PLL Controlled Delta-Sigma Modulator for Serial-ATA III.
DDECS 2008: 64-67 |
| 2005 |
| 1 |  | Meei-Ling Jan,
Keh-Shih Chuang,
Guo-Wei Chen,
Yu-Ching Ni,
Sharon Chen,
Chih-Hsien Chang,
Jay Wu,
Te-Wei Lee,
Ying-Kai Fu:
A three-dimensional registration method for automated fusion of micro PET-CT-SPECT whole-body images.
IEEE Trans. Med. Imaging 24(7): 886-893 (2005) |