Yiu-Hing Chan

	2012
4		James D. Warnock, Yiu-Hing Chan, Sean M. Carey, Huajun Wen, Patrick J. Meaney, Guenter Gerwig, Howard H. Smith, Yuen H. Chan, John Davis, Paul Bunce, Antonio Pelella, Daniel Rodko, Pradip Patel, Thomas Strach, Doug Malone, Frank Malgioglio, José Neves, David L. Rude, William V. Huott: Circuit and Physical Design Implementation of the Microprocessor Chip for the zEnterprise System. J. Solid-State Circuits 47(1): 151-163 (2012)
	2010
3		Xiao Yan Zhang, Yiu-Hing Chan, Robert K. Montoye, Leon J. Sigal, Eric M. Schwarz, Michael Kelly: A 270ps 20mW 108-bit End-around Carry Adder for Multiply-Add Fused Floating Point Unit. Signal Processing Systems 58(2): 139-144 (2010)
	2007
2		Brian W. Curran, Eric Fluhr, Jose Paredes, Leon J. Sigal, Joshua Friedrich, Yiu-Hing Chan, Charlie Hwang: Power-constrained high-frequency circuits for the IBM POWER6 microprocessor. IBM Journal of Research and Development 51(6): 715-732 (2007)
	2003
1		Yiu-Hing Chan, Prabhakar Kudva, Lisa B. Lacey, Gregory A. Northrop, Thomas E. Rosser: Physical synthesis methodology for high performance microprocessors. DAC 2003: 696-701

Coauthor Index

1	Paul Bunce	[4]
2	Sean M. Carey	[4]
3	Yuen H. Chan	[4]
4	Brian W. Curran	[2]
5	John Davis	[4]
6	Eric Fluhr	[2]
7	Joshua Friedrich	[2]
8	Guenter Gerwig	[4]
9	William V. Huott (Bill Huott)	[4]
10	Charlie Hwang	[2]
11	Michael Kelly	[3]
12	Prabhakar Kudva	[1]
13	Lisa B. Lacey	[1]
14	Frank Malgioglio	[4]
15	Doug Malone	[4]
16	Patrick J. Meaney	[4]
17	Robert K. Montoye	[3]
18	José Neves	[4]
19	Gregory A. Northrop	[1]
20	Jose Paredes	[2]
21	Pradip Patel	[4]
22	Antonio Pelella	[4]
23	Daniel Rodko	[4]
24	Thomas E. Rosser	[1]
25	David L. Rude	[4]
26	Eric M. Schwarz	[3]
27	Leon J. Sigal	[2] [3]
28	Howard H. Smith	[4]
29	Thomas Strach	[4]
30	James D. Warnock	[4]
31	Huajun Wen	[4]
32	Xiao Yan Zhang	[3]

Last update Tue May 29 01:28:40 2012 CET by the DBLP Team — Data released under the ODC-BY 1.0 license — See also our legal information page